Compile components for recovery with mtk_uartboot

I have a quite-possibly bricked Z8103AX-D that I have been trying to recover for some time now. I know it is not quite supported, though there is a PR that will add support (C/D/E differs from the A/B models only in flash partition settings) and I have been compiling based on a checkout of that specific commit.

I have been using the mtk_uartboot to get it to some sort of non-paperweight state. However, while some filogic (mt7981) based routers appear to offer bl2 + fip + itb files, which would enable recovery using this pathway, the Z8103AX setup only offers the monolithic bin file.

I have tried borrowing the bl2/fip files from similar routers, which can get me to a state where I have access to the bl2 bootmenu, which WOULD let me flash the nand with a binary via tftp, however since the flash partition settings differ from the router the boot files were borrowed from, it is unable to flash successfully, and I end up back at the failed boot..

My question is this: Is there an easy way to enable creating a bl2/fip file that I can use to get into a working bootmenu, assuming I am using a codebase modified to include support for this otherwise unsupported router? Is it a matter of changing some build flags, or is it a significant reworking? I suspect I am getting into the weeds because of the currently unsupported nature of the device, but I am not asking for device specific help, as much as inquiring about inner workings of the build system.

Attached is the boot log, captured via UART, of the "normal" broken boot of the system (without the mtk_uartboot handshake)

F0: 102B 0000
FA: 1040 0000
FA: 1040 0000 [0200]
F9: 0000 0000
V0: 0000 0000 [0001]
00: 0000 0000
BP: 2400 0041 [0000]
G0: 1190 0000
EC: 0000 0000 [1000]
T0: 0000 024B [010F]
Jump to BL

NOTICE:  BL2: v2.7(release):
NOTICE:  BL2: Built : 05:23:02, Sep 20 2023
NOTICE:  WDT: disabled
NOTICE:  EMI: Using DDR3 settings

dump toprgu registers data: 
1001c000 | 00000000 0000ffe0 00000000 00000000
1001c010 | 00000fff 00000000 00f00000 00000000
1001c020 | 00000000 00000000 00000000 00000000
1001c030 | 003c0003 003c0003 00000000 00000000
1001c040 | 00000000 00000000 00000000 00000000
1001c050 | 00000000 00000000 00000000 00000000
1001c060 | 00000000 00000000 00000000 00000000
1001c070 | 00000000 00000000 00000000 00000000
1001c080 | 00000000 00000000 00000000 00000000

dump drm registers data: 
1001d000 | 00000000 00000000 00000000 00000000
1001d010 | 00000000 00000000 00000000 00000000
1001d020 | 00000000 00000000 00000000 00000000
1001d030 | 00a083f1 000003ff 00100000 00000000
1001d040 | 00000000 00000000 00020303 000000ff
1001d050 | 00000000 00000000 00000000 00000000
1001d060 | 00000002 00000000 00000000 00000000
drm: 500 = 0x8 
[DDR Reserve] ddr reserve mode not be enabled yet
DDR RESERVE Success 0
[EMI] ComboMCP not ready, using default setting
BYTE_swap:0 
BYTE_swap:0 
Window Sum 528, worse bit 3, min window 64
Window Sum 544, worse bit 8, min window 68
Window Sum 328, worse bit 3, min window 38
Window Sum 332, worse bit 9, min window 40
Window Sum 344, worse bit 0, min window 42
Window Sum 352, worse bit 8, min window 42
Window Sum 360, worse bit 0, min window 44
Window Sum 358, worse bit 8, min window 44
Window Sum 372, worse bit 3, min window 44
Window Sum 372, worse bit 8, min window 44
Window Sum 380, worse bit 3, min window 44
Window Sum 376, worse bit 14, min window 44
Window Sum 392, worse bit 2, min window 48
Window Sum 390, worse bit 14, min window 46
Window Sum 402, worse bit 0, min window 48
Window Sum 404, worse bit 8, min window 50
Window Sum 414, worse bit 0, min window 50
Window Sum 422, worse bit 0, min window 52
Window Sum 422, worse bit 8, min window 50
Window Sum 426, worse bit 1, min window 52
Window Sum 426, worse bit 11, min window 52
Window Sum 432, worse bit 3, min window 52
Window Sum 434, worse bit 9, min window 52
Window Sum 436, worse bit 8, min window 52
Window Sum 436, worse bit 3, min window 52
Window Sum 438, worse bit 8, min window 54
NOTICE:  EMI: Detected DRAM size: 256MB
NOTICE:  EMI: complex R/W mem test passed
NOTICE:  CPU: MT7981 (1300MHz)
NOTICE:  SPI_NAND parses attributes from parameter page.
NOTICE:  SPI_NAND Detected ID 0xef
NOTICE:  Page size 2048, Block size 131072, size 134217728
NOTICE:  Initializing NMBM ...
NOTICE:  NMBM management region starts at block 960 [0x07800000]
NOTICE:  NMBM has been initialized in read-only mode
ERROR:   BL2: Failed to load image id 3 (-2)

Use the ram-bl2 for mt7981 provided by OpenWrt, and then as FIP

  1. load the vendor software’s FIP. If not contained in the update-image, you would need a backup from another person with the device.
  2. or load some FIP with an U-Boot with NMBM enabled and flash vendor fip from there, but this is riskier if you do not manage to abort the boot and if U-Boot for some reason writes to the flash and flash layout does not match