Read somewhere, that versions of Openwrt with early support of mx64/mx65 had issues with VLAN, is it going well with Openwrt 24.10 on mx64/mx65?
Can't get as far sysupgrade part, no ping/ssh/telnet on 192.168.1.1 after updating mtd0.
Have openwrt-bcm5862x-generic-meraki_mx64a0-initramfs-kernel.bin on a 100mb fat32 formatted partition on a usb stick inserted into the usb slot. From the moment of powerup led stays orange, but around 11 seconds after (if reset is pressed or usb stick is not inserted than 4 seconds after) the powerup orange led flashes(off/on) briefly, for about a second.
Did all preceding steps as per the instruction, log below.
installation log
# cat /sys/block/mtdblock0/ro
1
# devmem 0x18000000
0x3F00CF1E
# wget http://192.168.1.2/mtd-rw.ko
Connecting to 192.168.1.2 (192.168.1.2:80)
mtd-rw.ko 100% |*******************************| 52496 --:--:-- ETA
#
# insmod mtd-rw.ko i_want_a_brick=1
#
# dmesg
...
mtd-rw: mtd0: setting writeable flag
#
# cat /proc/mtd
dev: size erasesize name
mtd0: 00100000 00040000 "boot"
mtd1: 00100000 00040000 "nvram"
mtd2: 01000000 00040000 "linux"
mtd3: 01000000 00040000 "rootfs"
mtd4: 06000000 00040000 "senao"
#
# wget http://192.168.1.2/mtd
Connecting to 192.168.1.2 (192.168.1.2:80)
mtd 100% |*******************************| 7846 --:--:-- ETA
#
# chmod +x mtd
#
# wget http://192.168.1.2/uboot_mx64
Connecting to 192.168.1.2 (192.168.1.2:80)
uboot_mx64 100% |*******************************| 573k --:--:-- ETA
#
# ./mtd write uboot_mx64 /dev/mtd0
Unlocking /dev/mtd0 ...
Writing from uboot_mx64 to /dev/mtd0 ... [w]
#
Serial dump /w a usb stick inserted with openwrt-bcm5862x-generic-meraki_mx64a0-initramfs-kernel.bin on it.
serial dump
U-Boot 2012.10 (May 05 2022 - 09:47:09)Meraki MX64 Boot Kernel Loader
DEV ID = 0xcf1e
PCIE CFG DEV ID = 0x8025
OTP offset(0x8): 0x78701c01
OTP offset(0x9): 0xfe000018
OTP offset(0xa): 0xc01b0
OTP offset(0xb): 0x0
OTP offset(0xc): 0x4a00000
OTP offset(0xd): 0xfffde030
OTP offset(0xe): 0x35d17f
OTP offset(0xf): 0x20
NSP25 32bit DDR
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
DRAM: 2 GiB
WARNING: Caches not enabled
NAND: Micron MT29F8G08ABACA, Found strap type 0x6 strap page 0x2
256 KiB blocks, 4 KiB pages, 27B OOB, 8-bit
NAND: chipsize 1024 MiB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
arm_clk=1200MHz, axi_clk=600MHz, apb_clk=300MHz, arm_periph_clk=600MHz
Enabling icache and dcache
Enabling l2cache
Registering eth
Broadcom BCM IPROC Ethernet driver 0.1
Using GMAC2 (0x18024000)
ERROR: could not get env ethaddr
et0: ethHw_chipAttach: Chip ID: 0xcf1e; phyaddr: 0x1e
bcm_robo_attach: devid: 0x53025
Hit any key to stop autoboot: 0
UBI: attaching mtd1 to ubi0
UBI: physical eraseblock size: 262144 bytes (256 KiB)
UBI: logical eraseblock size: 253952 bytes
UBI: smallest flash I/O unit: 4096
UBI: VID header offset: 4096 (aligned 4096)
UBI: data offset: 8192
UBI: attached mtd1 to ubi0
UBI: MTD device name: "mtd=0"
UBI: MTD device size: 1015 MiB
UBI: number of good PEBs: 4057
UBI: number of bad PEBs: 3
UBI: max. allowed volumes: 128
UBI: wear-leveling threshold: 4096
UBI: number of internal volumes: 1
UBI: number of user volumes: 5
UBI: available PEBs: 1592
UBI: total number of reserved PEBs: 2465
UBI: number of PEBs reserved for bad PEB handling: 40
UBI: max/mean erase counter: 1444/905
Read 0 bytes from volume kernel to 90000000
Volume kernel not found!
(Re)start USB...
USB: Before reset, USB clk enable register is: 000000cd
Before reset, USB clk enable register is: 000000cd
usb2_reset_state is: 00000000
Register 1212 NbrPorts 2
USB EHCI 1.00
scanning bus for devices... 2 USB Device(s) found
scanning bus for storage devices... 1 Storage Device(s) found
reading openwrt-bcm53xx-generic-meraki_mx64_a0-initramfs.bin
** Unable to read "openwrt-bcm53xx-generic-meraki_mx64_a0-initramfs.bin" from usb 0:1 **
Wrong Image Format for bootm command
ERROR: can't get kernel image!
u-boot>
Serial dump /w a usb stick inserted with openwrt-bcm5862x-generic-meraki_mx64a0-initramfs-kernel.bin renamed to openwrt-bcm53xx-generic-meraki_mx64_a0-initramfs.bin as per the serial dump above.
serial dump
U-Boot 2012.10 (May 05 2022 - 09:47:09)Meraki MX64 Boot Kernel Loader
DEV ID = 0xcf1e
PCIE CFG DEV ID = 0x8025
OTP offset(0x8): 0x78701c01
OTP offset(0x9): 0xfe000018
OTP offset(0xa): 0xc01b0
OTP offset(0xb): 0x0
OTP offset(0xc): 0x4a00000
OTP offset(0xd): 0xfffde030
OTP offset(0xe): 0x35d17f
OTP offset(0xf): 0x20
NSP25 32bit DDR
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
DRAM: 2 GiB
WARNING: Caches not enabled
NAND: Micron MT29F8G08ABACA, Found strap type 0x6 strap page 0x2
256 KiB blocks, 4 KiB pages, 27B OOB, 8-bit
NAND: chipsize 1024 MiB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
arm_clk=1200MHz, axi_clk=600MHz, apb_clk=300MHz, arm_periph_clk=600MHz
Enabling icache and dcache
Enabling l2cache
Registering eth
Broadcom BCM IPROC Ethernet driver 0.1
Using GMAC2 (0x18024000)
ERROR: could not get env ethaddr
et0: ethHw_chipAttach: Chip ID: 0xcf1e; phyaddr: 0x1e
bcm_robo_attach: devid: 0x53025
Hit any key to stop autoboot: 0
UBI: attaching mtd1 to ubi0
UBI: physical eraseblock size: 262144 bytes (256 KiB)
UBI: logical eraseblock size: 253952 bytes
UBI: smallest flash I/O unit: 4096
UBI: VID header offset: 4096 (aligned 4096)
UBI: data offset: 8192
UBI: attached mtd1 to ubi0
UBI: MTD device name: "mtd=0"
UBI: MTD device size: 1015 MiB
UBI: number of good PEBs: 4057
UBI: number of bad PEBs: 3
UBI: max. allowed volumes: 128
UBI: wear-leveling threshold: 4096
UBI: number of internal volumes: 1
UBI: number of user volumes: 5
UBI: available PEBs: 1592
UBI: total number of reserved PEBs: 2465
UBI: number of PEBs reserved for bad PEB handling: 40
UBI: max/mean erase counter: 1444/905
Read 0 bytes from volume kernel to 90000000
Volume kernel not found!
(Re)start USB...
USB: Before reset, USB clk enable register is: 000000cd
Before reset, USB clk enable register is: 000000cd
usb2_reset_state is: 00000000
Register 1212 NbrPorts 2
USB EHCI 1.00
scanning bus for devices... 2 USB Device(s) found
scanning bus for storage devices... 1 Storage Device(s) found
reading openwrt-bcm53xx-generic-meraki_mx64_a0-initramfs.bin
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
5242912 bytes read
Wrong Image Format for bootm command
ERROR: can't get kernel image!
u-boot>
You have this newer u-boot ? i didn't changed initramfs name but i've flashed it last year with early images with not yet official support.
Hi, I installed the one from https://github.com/clayface/U-boot-MX64-20190430_MX64
I can't get as far as initramfs load
please check what release you need: mx64a0 or mx64 (as described in this thread).
Use the openwrt-bcm53xx...initramfs.bin and ...squashfs.sysupgrade.bin from leo´s google drive
https://drive.google.com/drive/folders/1sq2kuuHpL4ylq3zJKcKXXG2a0BRrdE4N
not the openwrt-bcm5862x... file from github.com/clayface
prepare a FAT32 usb stick accordingly and repeat the installation.
(note: mtd, mtd-ro and uboot_mx64 from github.com/clayface)
good luck!
Thanking you, your advice is probably one of the best (and most thorough) advices given to me in this thread so far.
I noticed that the sysupgrade image name for MX65 is not following the convention used by other devices: "openwrt-bcm53xx-generic-meraki_mx65-squashfs.sysupgrade.bin"
It should be "openwrt-bcm53xx-generic-meraki_mx65-squashfs-sysupgrade.bin"
Note the hyphen between squashfs and sysupgrade instead of the .
Hi, would you know what's the current POE status on 24.10.1 ?
PoE for MX65 will never be officially supported in OpenWrt. You have to use Leo's image or build your own private image.
Sorry for a layman question but do I understand it correctly there's no kmod-switch-qca8k package in the 24.10?
Thanks for the prompt reply. As I understand Openwrt supports POE somewhat, why is that support not being implemented for mx65?
It needs some Broadcom proprietary code..
I would like to build the current release (24.10.1) with the POE support from Leo's tree, is it feasable?
I didn't notice that when taking over the code from Clayface, but this doesn't really hurt, IMHO. Like as well, won't hurt to fix it - feel free to do so, as I'm quite busy with other topics right now.
Not entirely true. The source code is there, but needs refactoring before inclusion - at least extraction of the firmware blob from the driver itself and putting it under /lib/firmware
. Maybe one day I can take a look at this.
Openwrt 24.10.1 , indicative of which could the following be?
[116098.058231] ubi0: fixable bit-flip detected at PEB 3734
[116098.063619] ubi0: run torture test for PEB 3734
[116098.459451] ubi0: PEB 3734 passed torture test, do not mark it as bad
The error message is quite self explanatory. There was a fixable bit flip detected (not uncommon with NAND storage), and it was fixed.
Around three different PEB every day, is it ok?
Always the same three different PEB or completely random different PEB?