Bringing support for realtek-poe to mainline OpenWrt

mrnuke · June 26, 2022, 9:06pm

That is very interesting. The vendor FW on my Engenius EWS2910P only uses `pse_ctrl' 0. It looks like we might have to use quirks.

github.com/Hurricos/realtek-poe

realtek-poe: Add PSE ID quirk for Zyxel GS1900-24HP-v1

Hurricos:realtek-poe ← Hurricos:mrnuke-more-power

opened 09:00PM - 26 Jun 22 UTC

mrnuke

+124 -115

The "set global power budget" command contains a PSE controller in its argument… list. This was hardcoded to 0. On some switches, commands to PSE 0 do nothing. In those cases, the set budget command won't stick. The power budget remains at its default value, usually 0. Because of this, ports remain stuck in the "Requesting power" state. To solve this, send the budget command to the correct PSE ID or set of IDs. Use a mask to encode which PSE IDs neet the set budget command. When the "compatible" devicetree string matches Zyxel GS1900-24HP-v1, set the mask to 0xff, to command PS ID's 0->7. The vendor firmware also uses ID's 0->7. This enables power delivery to PoE sinks. ![image](https://user-images.githubusercontent.com/2610559/175833634-515c98e6-65f3-45d5-a348-a4e7ef509a93.png) Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

walterav · June 27, 2022, 5:22pm

While still using CI14 realtek-poe package I can confirm that just a ubus call poe reload changes the port status for ports 9-24 from Disabled to Searching and after running ubus call poe sendframe '{"frame" : "18 00 07 07 08 00 00"}' (since I just cold-booted the switch) it shows status Delivering power and starts powering PoE devices on port 9-24 !

EDIT: just quickly tested all ports from 1-24 and they all power on PoE and show correct status for connected devices.

mrnuke · June 27, 2022, 5:35pm

Yup, it's a bug. I see it now. We configure the ports before we parse any replies, so we're configuring with the assumption that there are 8 config.ports. With poe reload, We've parsed a sysinfo packet, and we know we have more than 8.

walterav · June 28, 2022, 6:55am

Great progress CI22 realtek-poe package now has port 1 working out of the box after install (because default config file only has single port reference) and when adding the other 2-24 ports to the config file and doing a ubus call poe reload will start the other PoE devices without interrupting the first and shows correct poe info status. No need for the ubus call poe sendframe anymore !

Also doing a coldboot/reboot makes PoE devices on port 1&24 comeback on powered without the need for any service restarts or ubus reloads, although most of the time the status for all the ports is reported unknown while they do deliver PoE... Doing multiple ubus call poe reload or /etc/init.d/poe reload won't fix the status reports from unknown, however doing a /etc/init.d/poe restart will kill / reset power on all devices and fix the status info again from unkown to searching/delivering.

Individual PoE port leds on the switch itself are still off although delivering PoE power, but that may also be a problem for the 8/10 port models @bmork ?

bmork · June 28, 2022, 9:49am

Could very well be. Haven't checked. I'm mostly doing remote access to these switches. Will try to remember to take a look the next time I am close to one.

But I wouldn't be surprised if these LEDs need to be configured somewhere and we don't

EDIT: I was wrong. The PoE LEDs are working on the GS1900-10HP. They are all green on the active ports, indicating at power delivered. Which is correct.

tmomas · June 28, 2022, 6:40pm

9 posts were split to a new topic: DGS-1210 GPIO support

hurricos · July 3, 2022, 10:27pm

This is now fixed (as of commit 3fd90e7047473).

Go and try out CI#25!

walterav · July 4, 2022, 1:28pm

I think that issue was already fixed somewhere between CI14 and CI22 that the port status of 9-24 came up after the first 8 with an extra /etc/init.d/poe reload.

mrnuke · July 5, 2022, 12:51am

Interesting behavior with the MCU firmware which I've noticed in several issues on github:

   CMD:    26 50 07 ff ff ff ff ff ff ff ff 75
   reply:  fd ff ff ff ff ff ff ff ff ff ff f3
RX <- fd ff ff ff ff ff ff ff ff ff ff f3
RX <- fd ff ff ff ff ff ff ff ff ff ff f3

If we send commands too fast, the MCU replies with fd packet. It then sends several fd packets. Even if we stop sending any more packets, it continues to send these fd replies. No indication that "system is now ready".

@svanheule, have you seen anything like this?

Ansuel · July 5, 2022, 2:49pm

No interrupt? regs to read? bits to read... To read / write the value you set a bit to comunicate a write process? it makes sense that with these things a delay value is needed

there must be something to pool and wait for the action to be applied

mrnuke · July 5, 2022, 4:08pm

I suppose "No longer sending fd" packet is the "System is now ready" message. This is UART protocol over some optoisolators. I am not aware of any interrupt lines crossing through the isolation barrier. That leaves the actual serial messages.

svanheule · July 5, 2022, 5:15pm

Can't recall anything like this from the stock FW. I don't think vendor firmwares spam the MCU with frames when they don't get a timely reply, but it's been a while since I've looked at UART traces...

mrnuke · July 5, 2022, 5:39pm

. realtek-poe is spamminng.

mrnuke · July 9, 2022, 10:00pm

I'm curious if reducing the number of setup packets makes the "stuck at disabled" ports issue go away. Turns out it's much easier to pack more data into a command than it is to implement a reliable retry mechanism.

mrnuke · July 19, 2022, 10:16pm

For anyone still watching on the forums, we got some fixes in, as well as some logging.

Getting logs if something fails

No need to run with debug output anymore. Relevant info should be logged and accessible with:

logread -te realtek-poe

Failures for commands 23, 26, 28, and 30 might still show up in the log. Want to get some miles on this updated code and make sure that no other command is failing. If these are the only failures, then the ports have been correctly configured.

What's the right build?

anon13997276 · July 21, 2022, 2:25pm

Hi,
I have a Netgear GS728TPv2 with 24 PoE+ ports and 190W power budget. Listening in on the conversation between SoC and the Nuvoton ARM chip I see the following:

This looks looks like the PoE protocol but in I2C. Is there already support for this? Is it foreseen to have different backends UART/I2C? Anyway, I need to first find the I2C bus, I had not looked for it and thought PoE was straightforward serial...

svanheule · July 21, 2022, 2:33pm

I've looked at a switch using I2C too (GS1920-24HP). The framing was identical, as far as I remember, just need to figure out which bus to use and what address the MCU is at.

GS1920-24HP I2C PoE control startup trace

20 W 17 00 01 ff ff ff ff ff ff ff ff 10
20 R 17 00 00 ff ff ff ff ff ff ff ff 0f (ff)
20 W 17 01 01 ff ff ff ff ff ff ff ff 11
20 R 17 01 00 ff ff ff ff ff ff ff ff 10 (ff)
    Set power management mode to "static"

20 W 1c 02 00 03 01 03 02 03 03 03 ff 2f
20 R 1c 02 00 00 01 00 02 00 03 00 ff 23 (ff)
20 W 1c 03 04 03 05 03 06 03 07 03 ff 40
20 R 1c 03 04 00 05 00 06 00 07 00 ff 34 (ff)
20 W 1c 04 08 03 09 03 0a 03 0b 03 ff 51
20 R 1c 04 08 00 09 00 0a 00 0b 00 ff 45 (ff)
20 W 1c 05 0c 03 0d 03 0e 03 0f 03 ff 62
20 R 1c 05 0c 00 0d 00 0e 00 0f 00 ff 56 (ff)
20 W 1c 06 10 03 11 03 12 03 13 03 ff 73
20 R 1c 06 10 00 11 00 12 00 13 00 ff 67 (ff)
20 W 1c 07 14 03 15 03 16 03 17 03 ff 84
20 R 1c 07 14 00 15 00 16 00 17 00 ff 78 (ff)
    Set port power-up mode to 802.3at (03)

20 W 05 08 00 01 01 01 02 01 03 01 ff 16
20 R 05 08 00 00 01 00 02 00 03 00 ff 12 (ff)
20 W 05 09 04 01 05 01 06 01 07 01 ff 27
20 R 05 09 04 00 05 00 06 00 07 00 ff 23 (ff)
20 W 05 0a 08 01 09 01 0a 01 0b 01 ff 38
20 R 05 0a 08 00 09 00 0a 00 0b 00 ff 34 (ff)
20 W 05 0b 0c 01 0d 01 0e 01 0f 01 ff 49
20 R 05 0b 0c 00 0d 00 0e 00 0f 00 ff 45 (ff)
20 W 05 0c 10 01 11 01 12 01 13 01 ff 5a
20 R 05 0c 10 00 11 00 12 00 13 00 ff 56 (ff)
20 W 05 0d 14 01 15 01 16 01 17 01 ff 6b
20 R 05 0d 14 00 15 00 16 00 17 00 ff 67 (ff)
    Clear statistics on all ports

20 W 18 0e 07 0f 6e 00 c8 ff ff ff ff 6e
20 R 18 0e 07 00 ff ff ff ff ff ff ff 26 (ff)
    Set power budget to 395.0W + 20.0W guard band

20 W 28 0f 00 01 01 01 02 01 03 01 ff 40
20 R 28 0f 00 11 01 11 02 11 03 11 ff 80 (ff)
20 W 28 10 04 01 05 01 06 01 07 01 ff 51
20 R 28 10 04 11 05 11 06 11 07 11 ff 91 (ff)
20 W 28 11 08 01 09 01 0a 01 0b 01 ff 62
20 R 28 11 08 11 09 11 0a 11 0b 11 ff a2 (ff)
20 W 28 12 0c 01 0d 01 0e 01 0f 01 ff 73
20 R 28 12 0c 11 0d 11 0e 11 0f 11 ff b3 (ff)
20 W 28 13 10 01 11 01 12 01 13 01 ff 84
20 R 28 13 10 11 11 11 12 11 13 11 ff c4 (ff)
20 W 28 14 14 01 15 01 16 01 17 01 ff 95
20 R 28 14 14 11 15 11 16 11 17 11 ff d5 (ff)
    Get short status for all ports (all 11: Searching/MPS absent)

20 W 1a 15 00 00 ff ff ff ff ff ff ff 28
20 R 1a 15 00 00 ff ff ff ff ff ff ff 28 (ff)
20 W 1a 16 01 00 ff ff ff ff ff ff ff 2a
20 R 1a 16 01 00 ff ff ff ff ff ff ff 2a (ff)
20 W 1a 17 02 00 ff ff ff ff ff ff ff 2c
20 R 1a 17 02 00 ff ff ff ff ff ff ff 2c (ff)
20 W 1a 18 03 00 ff ff ff ff ff ff ff 2e
20 R 1a 18 03 00 ff ff ff ff ff ff ff 2e (ff)
20 W 1a 19 04 00 ff ff ff ff ff ff ff 30
20 R 1a 19 04 00 ff ff ff ff ff ff ff 30 (ff)
20 W 1a 1a 05 00 ff ff ff ff ff ff ff 32
20 R 1a 1a 05 00 ff ff ff ff ff ff ff 32 (ff)
20 W 1a 1b 06 00 ff ff ff ff ff ff ff 34
20 R 1a 1b 06 00 ff ff ff ff ff ff ff 34 (ff)
20 W 1a 1c 07 00 ff ff ff ff ff ff ff 36
20 R 1a 1c 07 00 ff ff ff ff ff ff ff 36 (ff)
20 W 1a 1d 08 00 ff ff ff ff ff ff ff 38
20 R 1a 1d 08 00 ff ff ff ff ff ff ff 38 (ff)
20 W 1a 1e 09 00 ff ff ff ff ff ff ff 3a
20 R 1a 1e 09 00 ff ff ff ff ff ff ff 3a (ff)
20 W 1a 1f 0a 00 ff ff ff ff ff ff ff 3c
20 R 1a 1f 0a 00 ff ff ff ff ff ff ff 3c (ff)
20 W 1a 20 0b 00 ff ff ff ff ff ff ff 3e
20 R 1a 20 0b 00 ff ff ff ff ff ff ff 3e (ff)
20 W 1a 21 0c 00 ff ff ff ff ff ff ff 40
20 R 1a 21 0c 00 ff ff ff ff ff ff ff 40 (ff)
20 W 1a 22 0d 00 ff ff ff ff ff ff ff 42
20 R 1a 22 0d 00 ff ff ff ff ff ff ff 42 (ff)
20 W 1a 23 0e 00 ff ff ff ff ff ff ff 44
20 R 1a 23 0e 00 ff ff ff ff ff ff ff 44 (ff)
20 W 1a 24 0f 00 ff ff ff ff ff ff ff 46
20 R 1a 24 0f 00 ff ff ff ff ff ff ff 46 (ff)
20 W 1a 25 10 00 ff ff ff ff ff ff ff 48
20 R 1a 25 10 00 ff ff ff ff ff ff ff 48 (ff)
20 W 1a 26 11 00 ff ff ff ff ff ff ff 4a
20 R 1a 26 11 00 ff ff ff ff ff ff ff 4a (ff)
20 W 1a 27 12 00 ff ff ff ff ff ff ff 4c
20 R 1a 27 12 00 ff ff ff ff ff ff ff 4c (ff)
20 W 1a 28 13 00 ff ff ff ff ff ff ff 4e
20 R 1a 28 13 00 ff ff ff ff ff ff ff 4e (ff)
20 W 1a 29 14 00 ff ff ff ff ff ff ff 50
20 R 1a 29 14 00 ff ff ff ff ff ff ff 50 (ff)
20 W 1a 2a 15 00 ff ff ff ff ff ff ff 52
20 R 1a 2a 15 00 ff ff ff ff ff ff ff 52 (ff)
20 W 1a 2b 16 00 ff ff ff ff ff ff ff 54
20 R 1a 2b 16 00 ff ff ff ff ff ff ff 54 (ff)
20 W 1a 2c 17 00 ff ff ff ff ff ff ff 56
20 R 1a 2c 17 00 ff ff ff ff ff ff ff 56 (ff)
    Set all port priorities to low (00)

20 W 17 2d 01 ff ff ff ff ff ff ff ff 3d
20 R 17 2d 00 ff ff ff ff ff ff ff ff 3c (ff)
    Set power management mode again

20 W 28 2e 00 01 01 01 02 01 03 01 ff 5f
20 R 28 2e 00 11 01 11 02 11 03 11 ff 9f (ff)
20 W 28 2f 04 01 05 01 06 01 07 01 ff 70
20 R 28 2f 04 11 05 11 06 11 07 11 ff b0 (ff)
20 W 28 30 08 01 09 01 0a 01 0b 01 ff 81
20 R 28 30 08 11 09 11 0a 11 0b 11 ff c1 (ff)
20 W 28 31 0c 01 0d 01 0e 01 0f 01 ff 92
20 R 28 31 0c 11 0d 11 0e 11 0f 11 ff d2 (ff)
20 W 28 32 10 01 11 01 12 01 13 01 ff a3
20 R 28 32 10 11 11 11 12 11 13 11 ff e3 (ff)
20 W 28 33 14 01 15 01 16 01 17 01 ff b4
20 R 28 33 14 11 15 11 16 11 17 11 ff f4 (ff)
        Poll port statuses

20 W 28 34 00 01 01 01 02 01 03 01 ff 65
20 R 28 34 00 11 01 11 02 11 03 11 ff a5 (ff)
20 W 28 35 04 01 05 01 06 01 07 01 ff 76
20 R 28 35 04 11 05 11 06 11 07 11 ff b6 (ff)
20 W 28 36 08 01 09 01 0a 01 0b 01 ff 87
20 R 28 36 08 11 09 11 0a 11 0b 11 ff c7 (ff)
20 W 28 37 0c 01 0d 01 0e 01 0f 01 ff 98
20 R 28 37 0c 11 0d 11 0e 11 0f 11 ff d8 (ff)
20 W 28 38 10 01 11 01 12 01 13 01 ff a9
20 R 28 38 10 11 11 11 12 11 13 11 ff e9 (ff)
20 W 28 39 14 01 15 01 16 01 17 01 ff ba
20 R 28 39 14 11 15 11 16 11 17 11 ff fa (ff)

20 W 28 3a 00 01 01 01 02 01 03 01 ff 6b
20 R 28 3a 00 11 01 11 02 11 03 11 ff ab (ff)
20 W 28 3b 04 01 05 01 06 01 07 01 ff 7c
20 R 28 3b 04 11 05 11 06 11 07 11 ff bc (ff)
20 W 28 3c 08 01 09 01 0a 01 0b 01 ff 8d
20 R 28 3c 08 11 09 11 0a 11 0b 11 ff cd (ff)
20 W 28 3d 0c 01 0d 01 0e 01 0f 01 ff 9e
20 R 28 3d 0c 11 0d 11 0e 11 0f 11 ff de (ff)
20 W 28 3e 10 01 11 01 12 01 13 01 ff af
20 R 28 3e 10 11 11 11 12 11 13 11 ff ef (ff)
20 W 28 3f 14 01 15 01 16 01 17 01 ff c0
20 R 28 3f 14 11 15 11 16 11 17 11 ff 00 (ff)

20 W 28 40 00 01 01 01 02 01 03 01 ff 71
20 R 28 40 00 11 01 11 02 11 03 11 ff b1 (ff)
20 W 28 41 04 01 05 01 06 01 07 01 ff 82
20 R 28 41 04 11 05 11 06 11 07 11 ff c2 (ff)
20 W 28 42 08 01 09 01 0a 01 0b 01 ff 93
20 R 28 42 08 11 09 11 0a 11 0b 11 ff d3 (ff)
20 W 28 43 0c 01 0d 01 0e 01 0f 01 ff a4
20 R 28 43 0c 11 0d 11 0e 11 0f 11 ff e4 (ff)
20 W 28 44 10 01 11 01 12 01 13 01 ff b5
20 R 28 44 10 11 11 11 12 11 13 11 ff f5 (ff)
20 W 28 45 14 01 15 01 16 01 17 01 ff c6
20 R 28 45 14 11 15 11 16 11 17 11 ff 06 (ff)

20 W 28 46 00 01 01 01 02 01 03 01 ff 77
20 R 28 46 00 11 01 11 02 11 03 11 ff b7 (ff)
20 W 28 47 04 01 05 01 06 01 07 01 ff 88
20 R 28 47 04 11 05 11 06 11 07 11 ff c8 (ff)
20 W 28 48 08 01 09 01 0a 01 0b 01 ff 99
20 R 28 48 08 11 09 11 0a 11 0b 11 ff d9 (ff)
20 W 28 49 0c 01 0d 01 0e 01 0f 01 ff aa
20 R 28 49 0c 11 0d 11 0e 11 0f 11 ff ea (ff)
20 W 28 4a 10 01 11 01 12 01 13 01 ff bb
20 R 28 4a 10 11 11 11 12 11 13 11 ff fb (ff)
20 W 28 4b 14 01 15 01 16 01 17 01 ff cc
20 R 28 4b 14 11 15 11 16 11 17 11 ff 0c (ff)

20 W 28 4c 00 01 01 01 02 01 03 01 ff 7d
20 R 28 4c 00 11 01 11 02 11 03 11 ff bd (ff)
20 W 28 4d 04 01 05 01 06 01 07 01 ff 8e
20 R 28 4d 04 11 05 11 06 11 07 11 ff ce (ff)
20 W 28 4e 08 01 09 01 0a 01 0b 01 ff 9f
20 R 28 4e 08 11 09 11 0a 11 0b 11 ff df (ff)
20 W 28 4f 0c 01 0d 01 0e 01 0f 01 ff b0
20 R 28 4f 0c 11 0d 11 0e 11 0f 11 ff f0 (ff)
20 W 28 50 10 01 11 01 12 01 13 01 ff c1
20 R 28 50 10 11 11 11 12 11 13 11 ff 01 (ff)
20 W 28 51 14 01 15 01 16 01 17 01 ff d2
20 R 28 51 14 11 15 11 16 11 17 11 ff 12 (ff)

20 W 28 52 00 01 01 01 02 01 03 01 ff 83
20 R 28 52 00 11 01 11 02 11 03 11 ff c3 (ff)
20 W 28 53 04 01 05 01 06 01 07 01 ff 94
20 R 28 53 04 11 05 11 06 11 07 11 ff d4 (ff)
20 W 28 54 08 01 09 01 0a 01 0b 01 ff a5
20 R 28 54 08 11 09 11 0a 11 0b 11 ff e5 (ff)
20 W 28 55 0c 01 0d 01 0e 01 0f 01 ff b6
20 R 28 55 0c 11 0d 11 0e 11 0f 11 ff f6 (ff)
20 W 28 56 10 01 11 01 12 01 13 01 ff c7
20 R 28 56 10 11 11 11 12 11 13 11 ff 07 (ff)
20 W 28 57 14 01 15 01 16 01 17 01 ff d8
20 R 28 57 14 11 15 11 16 11 17 11 ff 18 (ff)

20 W 28 58 00 01 01 01 02 01 03 01 ff 89
20 R 28 58 00 11 01 11 02 11 03 11 ff c9 (ff)
20 W 28 59 04 01 05 01 06 01 07 01 ff 9a
20 R 28 59 04 11 05 11 06 11 07 11 ff da (ff)
20 W 28 5a 08 01 09 01 0a 01 0b 01 ff ab
20 R 28 5a 08 11 09 11 0a 11 0b 11 ff eb (ff)
20 W 28 5b 0c 01 0d 01 0e 01 0f 01 ff bc
20 R 28 5b 0c 11 0d 11 0e 11 0f 11 ff fc (ff)
20 W 28 5c 10 01 11 01 12 01 13 01 ff cd
20 R 28 5c 10 11 11 11 12 11 13 11 ff 0d (ff)
20 W 28 5d 14 01 15 01 16 01 17 01 ff de
20 R 28 5d 14 11 15 11 16 11 17 11 ff 1e (ff)

20 W 28 5e 00 01 01 01 02 01 03 01 ff 8f
20 R 28 5e 00 11 01 11 02 11 03 11 ff cf (ff)
20 W 28 5f 04 01 05 01 06 01 07 01 ff a0
20 R 28 5f 04 11 05 11 06 11 07 11 ff e0 (ff)
20 W 28 60 08 01 09 01 0a 01 0b 01 ff b1
20 R 28 60 08 11 09 11 0a 11 0b 11 ff f1 (ff)
20 W 28 61 0c 01 0d 01 0e 01 0f 01 ff c2
20 R 28 61 0c 11 0d 11 0e 11 0f 11 ff 02 (ff)
20 W 28 62 10 01 11 01 12 01 13 01 ff d3
20 R 28 62 10 11 11 11 12 11 13 11 ff 13 (ff)
20 W 28 63 14 01 15 01 16 01 17 01 ff e4
20 R 28 63 14 11 15 11 16 11 17 11 ff 24 (ff)

20 W 28 64 00 01 01 01 02 01 03 01 ff 95
20 R 28 64 00 11 01 11 02 11 03 11 ff d5 (ff)
20 W 28 65 04 01 05 01 06 01 07 01 ff a6
20 R 28 65 04 11 05 11 06 11 07 11 ff e6 (ff)
20 W 28 66 08 01 09 01 0a 01 0b 01 ff b7
20 R 28 66 08 11 09 11 0a 11 0b 11 ff f7 (ff)
20 W 28 67 0c 01 0d 01 0e 01 0f 01 ff c8
20 R 28 67 0c 11 0d 11 0e 11 0f 11 ff 08 (ff)
20 W 28 68 10 01 11 01 12 01 13 01 ff d9
20 R 28 68 10 11 11 11 12 11 13 11 ff 19 (ff)
20 W 28 69 14 01 15 01 16 01 17 01 ff ea
20 R 28 69 14 11 15 11 16 11 17 11 ff 2a (ff)

20 W 28 6a 00 01 01 01 02 01 03 01 ff 9b
20 R 28 6a 00 11 01 11 02 11 03 11 ff db (ff)
20 W 28 6b 04 01 05 01 06 01 07 01 ff ac
20 R 28 6b 04 11 05 11 06 11 07 11 ff ec (ff)
20 W 28 6c 08 01 09 01 0a 01 0b 01 ff bd
20 R 28 6c 08 11 09 11 0a 11 0b 11 ff fd (ff)
20 W 28 6d 0c 01 0d 01 0e 01 0f 01 ff ce
20 R 28 6d 0c 11 0d 11 0e 11 0f 11 ff 0e (ff)
20 W 28 6e 10 01 11 01 12 01 13 01 ff df
20 R 28 6e 10 11 11 11 12 11 13 11 ff 1f (ff)
20 W 28 6f 14 01 15 01 16 01 17 01 ff f0
20 R 28 6f 14 11 15 11 16 11 17 11 ff 30 (ff)

20 W 28 70 00 01 01 01 02 01 03 01 ff a1
20 R 28 70 00 11 01 11 02 11 03 11 ff e1 (ff)
20 W 28 71 04 01 05 01 06 01 07 01 ff b2
20 R 28 71 04 11 05 11 06 11 07 11 ff f2 (ff)
20 W 28 72 08 01 09 01 0a 01 0b 01 ff c3
20 R 28 72 08 11 09 11 0a 11 0b 11 ff 03 (ff)
20 W 28 73 0c 01 0d 01 0e 01 0f 01 ff d4
20 R 28 73 0c 11 0d 11 0e 11 0f 11 ff 14 (ff)
20 W 28 74 10 01 11 01 12 01 13 01 ff e5
20 R 28 74 10 11 11 11 12 11 13 11 ff 25 (ff)
20 W 28 75 14 01 15 01 16 01 17 01 ff f6
20 R 28 75 14 11 15 11 16 11 17 11 ff 36 (ff)

20 W 28 76 00 01 01 01 02 01 03 01 ff a7
20 R 28 76 00 11 01 11 02 11 03 11 ff e7 (ff)
20 W 28 77 04 01 05 01 06 01 07 01 ff b8
20 R 28 77 04 11 05 11 06 11 07 11 ff f8 (ff)
20 W 28 78 08 01 09 01 0a 01 0b 01 ff c9
20 R 28 78 08 11 09 11 0a 11 0b 11 ff 09 (ff)
20 W 28 79 0c 01 0d 01 0e 01 0f 01 ff da
20 R 28 79 0c 11 0d 11 0e 11 0f 11 ff 1a (ff)
20 W 28 7a 10 01 11 01 12 01 13 01 ff eb
20 R 28 7a 10 11 11 11 12 11 13 11 ff 2b (ff)
20 W 28 7b 14 01 15 01 16 01 17 01 ff fc
20 R 28 7b 14 11 15 11 16 11 17 11 ff 3c (ff)

20 W 28 7c 00 01 01 01 02 01 03 01 ff ad
20 R 28 7c 00 11 01 11 02 11 03 11 ff ed (ff)
20 W 28 7d 04 01 05 01 06 01 07 01 ff be
20 R 28 7d 04 11 05 11 06 11 07 11 ff fe (ff)
20 W 28 7e 08 01 09 01 0a 01 0b 01 ff cf
20 R 28 7e 08 11 09 11 0a 11 0b 11 ff 0f (ff)
20 W 28 7f 0c 01 0d 01 0e 01 0f 01 ff e0
20 R 28 7f 0c 11 0d 11 0e 11 0f 11 ff 20 (ff)
20 W 28 80 10 01 11 01 12 01 13 01 ff f1
20 R 28 80 10 11 11 11 12 11 13 11 ff 31 (ff)
20 W 28 81 14 01 15 01 16 01 17 01 ff 02
20 R 28 81 14 11 15 11 16 11 17 11 ff 42 (ff)

20 W 28 82 00 01 01 01 02 01 03 01 ff b3
20 R 28 82 00 11 01 11 02 11 03 11 ff f3 (ff)
20 W 28 83 04 01 05 01 06 01 07 01 ff c4
20 R 28 83 04 11 05 11 06 11 07 11 ff 04 (ff)
20 W 28 84 08 01 09 01 0a 01 0b 01 ff d5
20 R 28 84 08 11 09 11 0a 11 0b 11 ff 15 (ff)
20 W 28 85 0c 01 0d 01 0e 01 0f 01 ff e6
20 R 28 85 0c 11 0d 11 0e 11 0f 11 ff 26 (ff)
20 W 28 86 10 01 11 01 12 01 13 01 ff f7
20 R 28 86 10 11 11 11 12 11 13 11 ff 37 (ff)
20 W 28 87 14 01 15 01 16 01 17 01 ff 08
20 R 28 87 14 11 15 11 16 11 17 11 ff 48 (ff)

20 W 28 88 00 01 01 01 02 01 03 01 ff b9
20 R 28 88 00 11 01 11 02 11 03 11 ff f9 (ff)
20 W 28 89 04 01 05 01 06 01 07 01 ff ca
20 R 28 89 04 11 05 11 06 11 07 11 ff 0a (ff)
20 W 28 8a 08 01 09 01 0a 01 0b 01 ff db
20 R 28 8a 08 11 09 11 0a 11 0b 11 ff 1b (ff)
20 W 28 8b 0c 01 0d 01 0e 01 0f 01 ff ec
20 R 28 8b 0c 11 0d 11 0e 11 0f 11 ff 2c (ff)
20 W 28 8c 10 01 11 01 12 01 13 01 ff fd
20 R 28 8c 10 11 11 11 12 11 13 11 ff 3d (ff)
20 W 28 8d 14 01 15 01 16 01 17 01 ff 0e
20 R 28 8d 14 11 15 11 16 11 17 11 ff 4e (ff)

20 W 28 8e 00 01 01 01 02 01 03 01 ff bf
20 R 28 8e 00 11 01 11 02 11 03 11 ff ff (ff)
20 W 28 8f 04 01 05 01 06 01 07 01 ff d0
20 R 28 8f 04 11 05 11 06 11 07 11 ff 10 (ff)
20 W 28 90 08 01 09 01 0a 01 0b 01 ff e1
20 R 28 90 08 11 09 11 0a 11 0b 11 ff 21 (ff)
20 W 28 91 0c 01 0d 01 0e 01 0f 01 ff f2
20 R 28 91 0c 11 0d 11 0e 11 0f 11 ff 32 (ff)
20 W 28 92 10 01 11 01 12 01 13 01 ff 03
20 R 28 92 10 11 11 11 12 11 13 11 ff 43 (ff)
20 W 28 93 14 01 15 01 16 01 17 01 ff 14
20 R 28 93 14 11 15 11 16 11 17 11 ff 54 (ff)

20 W 28 94 00 01 01 01 02 01 03 01 ff c5
20 R 28 94 00 11 01 11 02 11 03 11 ff 05 (ff)
20 W 28 95 04 01 05 01 06 01 07 01 ff d6
20 R 28 95 04 11 05 11 06 11 07 11 ff 16 (ff)
20 W 28 96 08 01 09 01 0a 01 0b 01 ff e7
20 R 28 96 08 11 09 11 0a 11 0b 11 ff 27 (ff)
20 W 28 97 0c 01 0d 01 0e 01 0f 01 ff f8
20 R 28 97 0c 11 0d 11 0e 11 0f 11 ff 38 (ff)
20 W 28 98 10 01 11 01 12 01 13 01 ff 09
20 R 28 98 10 11 11 11 12 11 13 11 ff 49 (ff)
20 W 28 99 14 01 15 01 16 01 17 01 ff 1a
20 R 28 99 14 11 15 11 16 11 17 11 ff 5a (ff)

anon13997276 · July 23, 2022, 7:43pm

I have written I2C support:

github.com/Hurricos/realtek-poe

realtek-poe: Add support for PoE control over I2C

Hurricos:realtek-poe ← bkobl:realtek-poe

opened 07:42PM - 23 Jul 22 UTC

bkobl

+103 -9

This adds PoE control over I2C instead of the serial console. The protocol l…ogic is different from the serial logic, since an I2C slave cannot initiate transfers. Instead, after each command (I2C write) sent, the master immediately fetches the response from the MCU via an I2C read via a single I2C r/w cycle. The I2C controller will if necessary wait for the slave to be ready to send its reply in the I2C read transfer. There are no further libraries necessary to support I2C, as only iocl() calls are used on an i2c device in /dev/i2c-* We therefore always build with i2c support. For this to work, the kernel needs to be built with CONFIG_I2C_CHARDEV=y in order for the i2c character devices to be present in /dev. I2C instead of UART is selected by simply putting e.g. a option i2c_bus '3' in the global section of the poe configuration file, where '3' gives the number of the I2C character device. Optionally, an i2c_addr can be specified, which defaults to 0x20 as for the address in the only 2 known PoE devices with I2C. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>

I have not been able to get power out of a port on the Netgear GS728TPv2, however, but at least status reads work, so I believe the I2C logic to be correct.

anon13997276 · July 25, 2022, 9:29am

Netgear GS728TPv2 PoE control startup trace
Strange that PoE controllers 0-7 are being initialized using the 0x18 command.

 I2C trace to initialize PoE, slave address is 0x20
 Q: I2C-write to address 0x20
 R: I2C-read from address 0x20
 
 Q: 20 00 FF FF FF FF FF FF FF FF FF 17
 R: 20 00 02 18 00 E1 21 20 01 05 27 89
 0x20 Info
 
 Q: 20 01 FF FF FF FF FF FF FF FF FF 18
 R: 20 01 02 18 00 E1 21 20 01 05 27 8A
 0x20 Info - repeat
 
 Q: 07 02 02 FF FF FF FF FF FF FF FF 03
 R: 07 02 00 FF FF FF FF FF FF FF FF 01
 Set Global Port Power Limit: 0x2: 31.2W
 
 Q: 17 03 02 FF FF FF FF FF FF FF FF 14
 R: 17 03 00 FF FF FF FF FF FF FF FF 12
 Set Power management mode: 0x2 (dynamic?)
 
 Q: 2B 04 FF FF FF FF FF FF FF FF FF 26
 R: 2B 04 AA 01 01 00 00 01 03 01 00 E0
 0x2B: Get Extended device config
	UVLO:			0xAA (default)
	DDFLAG:			0x00 (default)
	OVLO:			0x01 (default)
	P3:			0x00 (NOT default)
 
 Q: 0B 05 00 01 00 FF FF FF FF FF FF 0B
 R: 0B 05 00 FF FF FF FF FF FF FF FF 08
 0x0B: Set Device Power Management
	Pre-Alloc		0x00 (allocated PW)
	Power-Up-Mode		0x01 (staggered)
	Disconnect Order	0x00 (overloaded first)
	GB hysteresis		0xFF (ignored)
 
 Q: 0A 06 AA 00 01 FF FF FF FF FF FF B5
 R: 0A 06 00 FF FF FF FF FF FF FF FF 08
 0x0A: Set Device Config
	UVLO:			0xAA (default)
	DDFLAG:			0x00 (default)
	OVLO:			0x01 (default)
	P3:			0xFF (default)
 
 Q: 41 07 01 00 00 02 00 00 00 41 FF 8B
 R: 41 07 00 FF FF FF FF FF FF FF FF 40
 0x041: Set Port Led Config
	Enable:			0x01: Enabled
	Interface:		0x00: SPI
	Shift Order		0x00: LSB
	Port LED count:		0x02: 2 LEDs
	REQ:			0x00
	ERR:			0x00
	On:			0x00
	Blink_override:		0x41 ????
	
 
 Q: 43 08 01 00 01 03 78 78 FF FF FF 3D
 R: 43 08 00 FF FF FF FF FF FF FF FF 43
 0x43: Set system LED:
	SysOK: 			0x01: Output High
	In Guard Band: 		0x00: Output Low
	Out of GB:		0x01: Output High
	Exceeds PS:		0x03: 10Hz Blink
	out_of_gb_off_delay	0x78: 120s
	exceeds_ps_off_delay	0x78: 120s
	
 
 Q: 18 09 00 07 6C 00 46 FF FF FF FF D6
 R: 18 09 00 00 FF FF FF FF FF FF FF 1A
 Q: 18 0A 01 07 6C 00 46 FF FF FF FF D8
 R: 18 0A 01 00 FF FF FF FF FF FF FF 1C
 Q: 18 0B 02 07 6C 00 46 FF FF FF FF DA
 R: 18 0B 02 00 FF FF FF FF FF FF FF 1E
 Q: 18 0C 03 07 6C 00 46 FF FF FF FF DC
 R: 18 0C 03 00 FF FF FF FF FF FF FF 20
 Q: 18 0D 04 07 6C 00 46 FF FF FF FF DE
 R: 18 0D 04 00 FF FF FF FF FF FF FF 22
 Q: 18 0E 05 07 6C 00 46 FF FF FF FF D8
 R: 18 0E 05 00 FF FF FF FF FF FF FF 24
 Q: 18 0F 06 07 6C 00 46 FF FF FF FF DA
 R: 18 0F 06 00 FF FF FF FF FF FF FF 26
 Q: 18 10 07 07 6C 00 46 FF FF FF FF DC
 R: 18 10 07 00 FF FF FF FF FF FF FF 28
 0x18: Set Global power budget for PSE controllers index 0-7 to 07 6C 00 46 (190.0W + 7.0W guard)
 
 Q: 1C 11 00 03 01 03 02 03 03 03 FF 3E
 R: 1C 11 00 00 01 00 02 00 03 00 FF 32
 Q: 1C 12 04 03 05 03 06 03 07 03 FF 4F
 R: 1C 12 04 00 05 00 06 00 07 00 FF 43
 Q: 1C 13 08 03 09 03 0A 03 0B 03 FF 60
 R: 1C 13 08 00 09 00 0A 00 0B 00 FF 54
 Q: 1C 14 0C 03 0D 03 0E 03 0F 03 FF 71
 R: 1C 14 0C 00 0D 00 0E 00 0F 00 FF 65
 Q: 1C 15 10 03 11 03 12 03 13 03 FF 82
 R: 1C 15 10 00 11 00 12 00 13 00 FF 76
 Q: 1C 16 14 03 15 03 16 03 17 03 FF 93
 R: 1C 16 14 00 15 00 16 00 17 00 FF 87
 0x1c: Set port power-up mode to 802.3at (0x03) (ports 0-23)

 Q: 28 17 01 01 03 01 05 01 07 01 FF 52
 R: 28 17 01 90 03 90 05 90 07 90 FF 8E
 Q: 28 18 09 01 0B 01 0D 01 0F 01 FF 73
 R: 28 18 09 90 0B 90 0D 90 0F 90 FF AF
 Q: 28 19 11 01 13 01 15 01 17 01 FF 94
 R: 28 19 11 90 13 90 15 90 17 90 FF D0
 Q: 28 1A 00 01 02 01 04 01 06 01 FF 51
 Q: 28 1A 00 90 02 90 04 90 06 10 FF 0D
 Q: 28 1B 08 01 0A 01 0C 01 0E 01 FF 72   
 R: 28 1B 08 90 0A 90 0C 90 0E 90 FF AE
 Q: 28 1C 10 01 12 01 14 01 16 01 FF 93   
 R: 28 1C 10 90 12 90 14 90 16 90 FF CF
 0x28 port status: all ports disabled (0x90)
 
 Q: 17 1D 02 FF FF FF FF FF FF FF FF 2E   
 R: 17 1D 00 FF FF FF FF FF FF FF FF 2C
 0x17: Set power management mode: 0x2: dynamic
 
 Q: 28 1E 01 01 03 01 05 01 07 01 FF 59
 R: 28 1E 01 90 03 90 05 90 07 90 FF 95
 Q: 28 20 09 01 0B 01 0D 01 0F 01 FF 7B
 R: 28 20 09 90 0B 90 0D 90 0F 90 FF B7
 Q: 28 21 11 01 13 01 15 01 17 01 FF 9C
 R: 28 21 11 90 13 90 15 90 17 90 FF D8
 0x28 port status: all odd ports disabled (0x90)
 
 Q: 23 1F FF FF FF FF FF FF FF FF FF 39   
 R: 23 1F 00 00 07 26 00 02 FF FF 00 6F
 0x23: Get power statistics 
 
 Q: 27 00 FF FF FF FF FF FF FF FF FF 1E   
 R: 27 00 02 07 6C 00 46 07 6C 00 46 9B
 Get Power management mode
 Request returns: 07 6C 00 46 (same as 0x18 setting above)
 Note: Sequence # is 00!
 
 Q: 18 23 00 07 0D 00 46 FF FF FF FF 91   
 R: 18 23 00 00 FF FF FF FF FF FF FF 34
 Q: 18 24 01 07 0D 00 46 FF FF FF FF 93   
 R: 18 24 01 00 FF FF FF FF FF FF FF 36
 Q: 18 25 02 07 0D 00 46 FF FF FF FF 95   
 R: 18 25 02 00 FF FF FF FF FF FF FF 38
 Q: 18 26 03 07 0D 00 46 FF FF FF FF 97   
 R: 18 26 03 00 FF FF FF FF FF FF FF 3A
 Q: 18 27 04 07 0D 00 46 FF FF FF FF 99   
 R: 18 27 04 00 FF FF FF FF FF FF FF 3C
 Q: 18 28 05 07 0D 00 46 FF FF FF FF 9B   
 R: 18 28 05 00 FF FF FF FF FF FF FF 3E
 Q: 18 29 06 07 0D 00 46 FF FF FF FF 9D   
 R: 18 29 06 00 FF FF FF FF FF FF FF 40
 Q: 18 2A 07 07 0D 00 46 FF FF FF FF 9F   
 R: 18 2A 07 00 FF FF FF FF FF FF FF 42
 0x18: Set Global power budget for PSE controllers index 0-7 to 07 0D 00 46 (180.5 + 7.0W guard)
 
 Q: 1C 2B 00 03 01 03 02 03 03 03 FF 58   
 R: 1C 2B 00 00 01 00 02 00 03 00 FF 4C
 Q: 1C 2C 04 03 05 03 06 03 07 03 FF 69   
 R: 1C 2C 04 00 05 00 06 00 07 00 FF 5D
 Q: 1C 2D 08 03 09 03 0A 03 0B 03 FF 7A   
 R: 1C 2D 08 00 09 00 0A 00 0B 00 FF 6E
 Q: 1C 2E 0C 03 0D 03 0E 03 0F 03 FF 8B   
 R: 1C 2E 0C 00 0D 00 0E 00 0F 00 FF 7F
 Q: 1C 2F 10 03 11 03 12 03 13 03 FF 9C   
 R: 1C 2F 10 00 11 00 12 00 13 00 FF 90
 Q: 1C 30 14 03 15 03 16 03 17 03 FF AD   
 R: 1C 30 14 00 15 00 16 00 17 00 FF A1
 0x1c: Set Port Power up Mode 0x03: (802.3at)

 Q: 1A 31 00 00 01 00 02 00 03 00 FF 50   
 R: 1A 31 00 00 01 00 02 00 03 00 FF 50
 Q: 1A 32 04 00 05 00 06 00 07 00 FF 61   
 R: 1A 32 04 00 05 00 06 00 07 00 FF 61
 Q: 1A 33 08 00 09 00 0A 00 0B 00 FF 72   
 R: 1A 33 08 00 09 00 0A 00 0B 00 FF 72
 Q: 1A 34 0C 00 0D 00 0E 00 0F 00 FF 83   
 R: 1A 34 0C 00 0D 00 0E 00 0F 00 FF 83
 Q: 1A 35 10 00 11 00 12 00 13 00 FF 94   
 R: 1A 35 10 00 11 00 12 00 13 00 FF 94
 Q: 1A 36 14 00 15 00 16 00 17 00 FF A5   
 R: 1A 36 14 00 15 00 16 00 17 00 FF A5
0x1A: Set port priority to low (0x00) on ports 0-23
 
 Q: 15 37 00 02 01 02 02 02 03 02 FF 59   
 R: 15 37 00 00 01 00 02 00 03 00 FF 51
 Q: 15 38 04 02 05 02 06 02 07 02 FF 6A   
 R: 15 38 04 00 05 00 06 00 07 00 FF 62
 Q: 15 39 08 02 09 02 0A 02 0B 02 FF 7B   
 R: 15 39 08 00 09 00 0A 00 0B 00 FF 73
 Q: 15 3A 0C 02 0D 02 0E 02 0F 02 FF 8C   
 R: 15 3A 0C 00 0D 00 0E 00 0F 00 FF 84
 Q: 15 3B 10 02 11 02 12 02 13 02 FF 9D   
 R: 15 3B 10 00 11 00 12 00 13 00 FF 95
 Q: 15 3C 14 02 15 02 16 02 17 02 FF AE   
 R: 15 3C 14 00 15 00 16 00 17 00 FF A6
 0x15: Set Port Power Limit type to 0x02 (User defined)

 Q: 16 3D 00 96 01 96 02 96 03 96 FF B0   
 R: 16 3D 00 00 01 00 02 00 03 00 FF 58
 Q: 16 3E 04 96 05 96 06 96 07 96 FF C1   
 R: 16 3E 04 00 05 00 06 00 07 00 FF 69
 Q: 16 3F 08 96 09 96 0A 96 0B 96 FF D2   
 R: 16 3F 08 00 09 00 0A 00 0B 00 FF 7A
 Q: 16 40 0C 96 0D 96 0E 96 0F 96 FF E3   
 R: 16 40 0C 00 0D 00 0E 00 0F 00 FF 8B
 Q: 16 41 10 96 11 96 12 96 13 96 FF F4   
 R: 16 41 10 00 11 00 12 00 13 00 FF 9C
 Q: 16 42 14 96 15 96 16 96 17 96 FF 05   
 R: 16 42 14 00 15 00 16 00 17 00 FF AD
 0x16: Set Port Power limit to 0x96 (30W) on ports 0-23

 Q: 00 43 00 01 01 01 02 01 03 01 FF 4C   
 R: 00 43 00 00 01 00 02 00 03 00 FF 48
 Q: 03 44 00 01 01 01 02 01 03 01 FF 50   
 R: 03 44 00 00 01 00 02 00 03 00 FF 4C
 Q: 00 45 04 01 05 01 06 01 07 01 FF 5E   
 R: 00 45 04 00 05 00 06 00 07 00 FF 5A
 Q: 03 46 04 01 05 01 06 01 07 01 FF 62   
 R: 03 46 04 00 05 00 06 00 07 00 FF 5E
 Q: 00 47 08 01 09 01 0A 01 0B 01 FF 70   
 R: 00 47 08 00 09 00 0A 00 0B 00 FF 6C
 Q: 03 48 08 01 09 01 0A 01 0B 01 FF 74   
 R: 03 48 08 00 09 00 0A 00 0B 00 FF 70
 Q: 00 49 0C 01 0D 01 0E 01 0F 01 FF 82   
 R: 00 49 0C 00 0D 00 0E 00 0F 00 FF 7E
 Q: 03 4A 0C 01 0D 01 0E 01 0F 01 FF 86   
 R: 03 4A 0C 00 0D 00 0E 00 0F 00 FF 82
 Q: 00 4B 10 01 11 01 12 01 13 01 FF 94   
 R: 00 4B 10 00 11 00 12 00 13 00 FF 90
 Q: 03 4C 10 01 11 01 12 01 13 01 FF 98   
 R: 03 4C 10 00 11 00 12 00 13 00 FF 94
 Q: 00 4D 14 01 15 01 16 01 17 01 FF A6   
 R: 00 4D 14 00 15 00 16 00 17 00 FF A2
 Q: 03 4E 14 01 15 01 16 01 17 01 FF AA   
 R: 03 4E 14 00 15 00 16 00 17 00 FF A6
 0x00 + 0x03: Pairs of Port enable (0x01) and port reset for all ports 0-23

 Q: 10 4F 00 02 01 02 02 02 03 02 FF 6C   
 R: 10 4F 00 00 01 00 02 00 03 00 FF 64
 Q: 10 50 04 02 05 02 06 02 07 02 FF 7D   
 R: 10 50 04 00 05 00 06 00 07 00 FF 75
 Q: 10 51 08 02 09 02 0A 02 0B 02 FF 8E   
 R: 10 51 08 00 09 00 0A 00 0B 00 FF 86
 Q: 10 52 0C 02 0D 02 0E 02 0F 02 FF 9F   
 R: 10 52 0C 00 0D 00 0E 00 0F 00 FF 97
 Q: 10 53 10 02 11 02 12 02 13 02 FF B0   
 R: 10 53 10 00 11 00 12 00 13 00 FF A8
 Q: 10 54 14 02 15 02 16 02 17 02 FF C1   
 R: 10 54 14 00 15 00 16 00 17 00 FF B9
0x10: Set Detection type to 0x02 (802.3af 4-point, default) on all ports

 Q: 2B 55 FF FF FF FF FF FF FF FF FF 77   
 R: 2B 55 AA 00 01 00 00 01 03 01 00 30
 0x2B: Get Extended device config, reply at boot was: AA 01 01 00 00 01 03 01 00
 
 Q: 0B 56 01 01 00 FF FF FF FF FF FF 5D   
 R: 0B 56 00 FF FF FF FF FF FF FF FF 59
 0x0B: Set Device Power Managent (set to Pre-Alloc on actual power consumption)
 
 Q: 2B 57 FF FF FF FF FF FF FF FF FF 79   
 R: 2B 57 AA 01 01 00 00 01 03 01 00 33
 0x2B: Get Extended device config, we are back to boot reply

 Q: 0B 58 01 01 00 FF FF FF FF FF FF 5F   
 R: 0B 58 00 FF FF FF FF FF FF FF FF 5B
 0x0B: Set Device Power Management
	Pre-Alloc		0x01 (TOTAL PW, changed from previous setting)
	Power-Up-Mode		0x01 (staggered)
	Disconnect Order	0x00 (overloaded first)
	GB hysteresis		0xFF (ignored)

 Q: 28 59 00 01 02 01 04 01 06 01 FF 90
 R: 28 59 00 90 02 90 04 90 06 10 FF 4C
 Q: 28 5A 08 01 0A 01 0C 01 0E 01 FF B1   
 R: 28 5A 08 90 0A 90 0C 90 0E 90 FF ED
 Q: 28 5B 10 01 12 01 14 01 16 01 FF D2   
 R: 28 5B 10 90 12 90 14 90 16 90 FF 0E
 0x28 port status: all even ports disabled (0x90, port 6: cable attached, disabled, 0x10)

 Q: 23 5C FF FF FF FF FF FF FF FF FF 76   
 R: 23 5C 00 00 06 C7 00 02 FF FF 00 4C
 0x23: Get power statistics

 Q: 27 00 FF FF FF FF FF FF FF FF FF 1E   
 R: 27 00 02 07 0D 00 46 07 0D 00 46 DD
0x27: Get Power management mode (not sequency number is 0)

 Q: 28 5E 01 01 03 01 05 01 07 01 FF 99   
 R: 28 5E 01 90 03 90 05 90 07 90 FF D5
 Q: 28 5F 09 01 0B 01 0D 01 0F 01 FF BA   
 R: 28 5F 09 90 0B 90 0D 90 0F 90 FF F6
 Q: 28 60 11 01 13 01 15 01 17 01 FF DB   
 R: 28 60 11 90 13 90 15 90 17 90 FF 17
 0x28 port status: all odd ports disabled (0x90)

 Q: 2B 61 FF FF FF FF FF FF FF FF FF 83   
 R: 2B 61 AA 01 01 00 00 01 03 01 00 3D
 0x2B: Get Extended device config (boot reply)

 Q: 0B 62 01 01 00 FF FF FF FF FF FF 69   
 R: 0B 62 00 FF FF FF FF FF FF FF FF 65
 0x0B: Set Device Power Managent (set to Pre-Alloc on actual power consumption)
 
 Q: 23 63 FF FF FF FF FF FF FF FF FF 7D   
 R: 23 63 00 00 06 C7 00 02 FF FF 00 53
 0x23: Get power statistics
 
 Q: 27 00 FF FF FF FF FF FF FF FF FF 1E   
 R: 27 00 02 07 0D 00 46 07 0D 00 46 DD
 0x27: Get power Management Mode, sequence number is 00, no PSE given
 
 Q: 28 65 00 01 02 01 04 01 06 01 FF 9C   
 R: 28 65 00 90 02 90 04 90 06 10 FF 58
 Q: 28 66 08 01 0A 01 0C 01 0E 01 FF BD   
 R: 28 66 08 90 0A 90 0C 90 0E 90 FF F9
 Q: 28 67 10 01 12 01 14 01 16 01 FF DE   
 R: 28 67 10 90 12 90 14 90 16 90 FF 1A
 0x28 port status: all even ports disabled (0x90), port 6 has cable attached
 
 Q: 28 68 01 01 03 01 05 01 07 01 FF A3   
 R: 28 68 01 91 03 91 05 91 07 91 FF E3
 Q: 28 69 09 01 0B 01 0D 01 0F 01 FF C4   
 R: 28 69 09 91 0B 91 0D 91 0F 91 FF 04
 Q: 28 6A 11 01 13 01 15 01 17 01 FF E5   
 R: 28 6A 11 91 13 91 15 91 17 91 FF 25
 0x28 port status: all odd ports searching (0x01, 0x91)

bmork · August 2, 2022, 11:26am

Nice work, finally being able to run these switches on OpenWrt master without any additional patches.

Only thing missing now is the ability do turn off/on ports without necessarily reconfiguring the daemon. This feature was there from the beginning in the old lua code. The use case is one of the main PoE selling arguments for me: Remote power control of the connected devices, doing hard resets in a remote lab.

I have a proposal here: https://github.com/Hurricos/realtek-poe/pull/24

This is modelled after the lua implementation, but I felt the original one-based port index was too confusing. Especially now that we can support lots of ports. So I changed the "port" parameter into the port name.