It's been a while, anyway after much thought and considerations I flashed breed on my 1043ND v4. I used the file breed-qca956x-uart_rx18_tx22-reset2.bin. I figured out gpio from dts files and rx tx values from trial and error. Basically I flashed the files one by one until serial works. I knew the reset was 2 so I had less files to flash and see.
After it was installed, I overclocked it to 1000MHz. Device is stable as it can be.
Please ask in DL-WRX36 thread, the reply can be relevant to others:
https://forum.openwrt.org/t/dynalink-dl-wrx36-askey-rt5010w-ipq8072a-openwrt-support/110454
The wiki is not updated.
roger that, thanks
Do you use any cooling? Also, I have no overclock and this device shows 385MHz bogomips on /proc/cpuinfo. On wiki it says it's 750Mhz?
Sorry for the late response,
I don't use any cooling. I wouldn't use that file to confirm cpu clock speed. You need to see it the system log. It should show something like this.
2023-10-25 09:28:12 info kernel[]: [ 0.000000] CPU clock: 1000.000 MHz (yours should show 750Mhz)
2023-10-25 09:28:12 info kernel[]: [ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 3822520893 ns
2023-10-25 09:28:12 info kernel[]: [ 0.000006] sched_clock: 32 bits at 500MHz, resolution 2ns, wraps every 4294967295ns
Okay, how did you do it? I take it you installed this breed thing but how? From serial console? I got the tools and expertise for that. Please tell me.
How did you figure out gpios from DTS files though?
Which commands at serial did you reinstall uboot with? I am at ath> console. Too many commands. Don't know which to do.
First of all, I will not recommend this unless you know what you're doing. You need all the recovery tools incase something goes south.
For my device 1043nd v4 I looked at it's dts file and it shows reset at gpio 2 so I used a breed file that has reset at 2.
For your device archer c7 v5 https://github.com/openwrt/openwrt/blob/8bb4437c01ca35a5ac67e391630a1b24cb52dbb7/target/linux/ath79/dts/qca9563_tplink_archer-c7-v5.dts
It shows reset at gpio 5.
Confirm it by running this command in root shell
cat /sys/kernel/debug/gpio
So you need breed that has reset at 5, but I don't see such file in the server.
Okay let me get this straight. No reset gpio 5 image there you say. So when I upload any of them reset wont work? Since no reset= no access to breed am I right?
Yes exactly. Only way to boot into breed is by holding down reset button while powering on.
I bricked the router though xD No uboot not even serial input now. Frick...
How? I'm sure you took a backup of it's art partition before beginning any experiment since that is the most important partition for device's wireless capabilities.
I did but recovering this is extremely difficult. You flash with addresses not like "flash xx.img to_boot_partition" nope. You write 0x312312321 stuff.
Which is why I didn't recommend this, to recover from this brick, you need tools such as ch341 programmer to flash directly into flash IC. Serial flashing will not work.
Before coming to that you need to rebuild the firmware using that art partition you backed up.
I wanted to ask there was no breed file available for reset 5, which file did you flash anyway? Also breed needed to be flashed from within openwrt root shell using kmod-mtd-rw.
I used this guys bin file: https://github.com/gwlim/archer-c7v4-uboot/tree/master
I used this command to write it:
mtd -r write /tmp/1000mhzfile.bin u-boot
Because according to this topic the guy also used that command. But however then router got into this boot loop, probably uboot went nuts. I tried to recover it by flashing openwrt but didn't work. Then went ahead and reflash u-boot myself but damn it's recovery is extremely obscure. Weird memory commands and all. Must've slacked somewhere.
Its for c7 v4, perhaps some sort of incompatibility between the uboot versions of the devices. This seems to be patched uboot with pre modified clock speeds. Only one issue with this if there's some problem with clock speeds or the system doesn't boot, then one can't do anything to reflash u-boot. In breed, if set clock speeds are not able to boot openwrt, then it goes back to stable ones automatically.
And I would avoid using memory commands if possible, they do more harm than good.
Anyway, your only option is to reflash your flash IC using programmer.
I got the RT809H programmer, but I don't think these are compatible. Those NAND flash I mostly program are bigger, I don't see that big nand flash thing only smaller chips. I could only program these in the picture, but I don't see anything like this on the board:
I think RT809H should work just fine. You have two options, either desolder the flash chip from board and read directly using an sop8 adapter or use something similar like this.
I did notice one thing which may've gone wrong. c7 v5 has the flash layout where there are two u-boot partitions.
| dev | start | end | size | erasesize | name |
|---|---|---|---|---|---|
| mtd0 | 00000000 | 00020000 | 00020000 | 00010000 | factory-uboot |
| mtd1 | 00020000 | 00040000 | 00020000 | 00010000 | u-boot |
| mtd2 | 00040000 | 00050000 | 00010000 | 00010000 | partition-table |
| mtd3 | 00050000 | 00060000 | 00010000 | 00010000 | art |
| mtd4 | 00060000 | 00080000 | 00020000 | 00010000 | info |
As far as I know, perhaps I may've read somewhere also that mtd0 uboot needs to be replaced and not mtd1. So the command should've been like this mtd -r write /tmp/1000mhzfile.bin factory-uboot
Also not to mention the git readme states, Merge mtd0 (partition 0) of router uboot with the binary files according to the overclock values wanted, so factory-uboot(original file of your router) + 1000mhz binary file in git = 1000mhzfile.bin.
I would first try with 800 to see if everything works then move to 1000.
