No,no CPU is Gbit capable as the router is Gigabit.
Testing it with Iperf3 on LAN cable gives 956 mbit/sec.
Your link is stating diverse antenna.
BTW I found this ->https://www.data-alliance.net/blog/dual-polarity-antennas-mimo-carriergrade-antennas/
A lot of useful information.
Yet I wish I could use the amplifier for all SMB router ports but from all this said I'm starting to believe I'll just get PHY rate and max speeds of just 1 antenna (as you say one propagation way). Which is 150mbps and 75mbps on the udp protocol..
I saw something interesting into the ath9k sources - it looks like the diversity/combining behaviour could be controlled. The LNA1-LNA2 option looks promising if it means that we can use it as a noise canceller to remove the local co-channel interference/noise over point-to-point links.
/ath9k/antenna.c:
#include "ath9k.h"
/*
* AR9285
* ======
*
* EEPROM has 2 4-bit fields containing the card configuration.
*
* antdiv_ctl1:
* ------------
* bb_enable_ant_div_lnadiv : 1
* bb_ant_div_alt_gaintb : 1
* bb_ant_div_main_gaintb : 1
* bb_enable_ant_fast_div : 1
*
* antdiv_ctl2:
* -----------
* bb_ant_div_alt_lnaconf : 2
* bb_ant_div_main_lnaconf : 2
*
* The EEPROM bits are used as follows:
* ------------------------------------
*
* bb_enable_ant_div_lnadiv - Enable LNA path rx antenna diversity/combining.
* Set in AR_PHY_MULTICHAIN_GAIN_CTL.
*
* bb_ant_div_[alt/main]_gaintb - 0 -> Antenna config Alt/Main uses gaintable 0
* 1 -> Antenna config Alt/Main uses gaintable 1
* Set in AR_PHY_MULTICHAIN_GAIN_CTL.
*
* bb_enable_ant_fast_div - Enable fast antenna diversity.
* Set in AR_PHY_CCK_DETECT.
*
* bb_ant_div_[alt/main]_lnaconf - Alt/Main LNA diversity/combining input config.
* Set in AR_PHY_MULTICHAIN_GAIN_CTL.
* 10=LNA1
* 01=LNA2
* 11=LNA1+LNA2
* 00=LNA1-LNA2
*
* AR9485 / AR9565 / AR9331
* ========================
*
* The same bits are present in the EEPROM, but the location in the
* EEPROM is different (ant_div_control in ar9300_BaseExtension_1).
*
* ant_div_alt_lnaconf ==> bit 0~1
* ant_div_main_lnaconf ==> bit 2~3
* ant_div_alt_gaintb ==> bit 4
* ant_div_main_gaintb ==> bit 5
* enable_ant_div_lnadiv ==> bit 6
* enable_ant_fast_div ==> bit 7
*/
Some YouTube video explaining the basic principle: https://www.youtube.com/watch?v=Gt0Hokz_m3w
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