given the above, is my suggestion not still the appropriate path at this time ? ... until there is actually driver support ?
I have reinstated my original post ... until you suggest otherwise.
The Unassigned class [ff00] means the PCI bus sees the chip, but no driver has attached to it yet... probably because its NOT a SDX62 ... its a SDX55 
But the good news, it seems the SDX55 is supported by the mhi-pci-generic driver.
change your pcie1 node ..
&pcie1 {
/* SDX55 standard IPQ5018 offsets */
qcom,msi-gicm-addr = <0x0b00a040>;
qcom,msi-gicm-base = <0x140>; // SDX55 starts at 0x140 .. SPI 128
pcie@0 {
/* ... existing child node ... */
};
}
You need include the kmod-mhi-pci-generic package in your DEVICE_PACKAGES in the ipq50xx.mk
For the led, for the time being I am sure we can just use gpio led. You'll need to find the exact gpio. Something like this may do it
for i in 1 6 11 26 31; do
echo $i > /sys/class/gpio/export
echo out > /sys/class/gpio/gpio$i/direction
echo 1 > /sys/class/gpio/gpio$i/value
echo "Testing GPIO $i - look at the WAN LED!"
sleep 2
echo 0 > /sys/class/gpio/gpio$i/value
done
but there is tools for this if that does not work ... i used to use a script called gpio-hunter but i can't find it at the moment. Do a search, there lots of info about identifying gpios
Adding this doesn't change anything, so it must be as it is.
The LED script for the WAN port didn't show anything useful, so for now I'm leaving it and trying to get the internet working on modem.
use the SDX55 settings,
the WAN led never came on for 2 seconds for anyone of the gpios ?? the script doesn't output anything it just cycle's thru the gpios .. your looking at the led not the script output if/until the led comes on then you'd note the number in the output. the led is not a big dig anyway ..
for the modem, you've added the kmod-mhi-pci-generic to the ipq50xx.mk ? is it still showing Unassigned class [ff00] ? you may need the other mhi packages as well .. kmod-mhi-net and kmod-mhi-wwan-ctrl
are are you still getting the modem error ?
[ 19.952943] usbserial: USB Serial support registered for Qualcomm USB modem
[ 19.961594] Error: Driver 'gpio-keys' is already registered, aborting...
[ 20.060536] kmodloader: 1 module could not be probed
[ 20.060750] kmodloader: - gpio_keys - 0
a current bootlog might help ..
xunison_exigo-hub-d50-5g
define Device/xunison_exigo-hub-d50-5g
$(call Device/FitImage)
KERNEL_IN_UBI := 1
DEVICE_VENDOR := Xunison
DEVICE_MODEL := Exigo Hub D50 5G
SOC := ipq5018
BLOCKSIZE := 128k
PAGESIZE := 2048
SOC := ipq5018
SUBPAGESIZE := 2048
VID_HDR_OFFSET := 2048
NAND_SIZE := 128m
IMAGE_SIZE := 59392k
DEVICE_DTS_CONFIG := config@mp03.1
BOOT_SCRIPT := xunison_exigo-hub-d50-5g.bootscript
DEVICE_FIT_DESC := "Flashing nand 800 20000"
IMAGES := factory.img sysupgrade.bin
IMAGE/factory.img := append-ubi | gl-qsdk-factory | append-metadata
DEVICE_PACKAGES := ath11k-firmware-ipq5018 \
kmod-ath11k-pci \
ath11k-firmware-qcn9074 \
ipq-wifi-xunison_exigo-hub-d50-5g \
pciutils \
usbutils \
kmod-mhi-wwan-ctrl \
kmod-mhi-wwan-mbim \
kmod-mhi-bus \
kmod-mhi-pci-generic \
kmod-mhi-net \
uqmi umbim \
kmod-usb-serial-option \
kmod-usb-net-qmi-wwan \
dumpimage
endef
TARGET_DEVICES += xunison_exigo-hub-d50-5g
There's no need to worry about it so much, that's just how it's supposed to be.
I checked both the LED and the script. The LED didn't turn on, and the script is returning errors. We have to wait until it's added via a "software update".
Right now, I'm focusing on modem. Something is missing in my system or packages because the devices aren't showing up.
root@QuectelPi:~# ls /dev/mhi*
/dev/mhi_BHI /dev/mhi_DIAG /dev/mhi_DUN /dev/mhi_LOOPBACK /dev/mhi_QMI0
ls: /dev/mhi*: No such file or directory
I'll keep trying.
i think you need wwan package to handle the network interface orchestration.
try this
DEVICE_PACKAGES := \
ath11k-firmware-ipq5018 \
kmod-ath11k-pci \
ath11k-firmware-qcn9074 \
ipq-wifi-xunison_exigo-hub-d50-5g \
pciutils usbutils dumpimage \
kmod-mhi-bus \
kmod-mhi-pci-generic \
kmod-mhi-wwan-ctrl \
kmod-mhi-wwan-mbim \
kmod-mhi-net \
kmod-wwan \
wwan \
uqmi umbim \
modemmanager \
kmod-usb-serial-option \
kmod-usb-net-qmi-wwan
canyou post a recent bootlog ..just trim out what you want to redact, i'm just wondering if there is something obvious in the log that may help
I have all those packages, except for ModemManager.
@IceG i replied to myself ..
and these ones ... unless you are using something other than what you posted ..
I didn't include all the packages for creating the image, I have other packages for that.
Unfortunately, modem isn't working, it won't establish a connection, and there's no data traffic.
root@OpenWrt:~# [ 88.725107] wwan0: Failed to queue TX buf (-11)
regardless your makefile entry should include the updated list i provided. these are the base packages that should be included for basic functionality.
as for you issues, seems like a configuration issue, the hw is now correctly identified and seems to be up and functional. tho the gpios already registered and failed probe errors are concerning ... I am at work all week so i won't have a chance to look into it until the weekend.
Adding packages isn't a problem.
Router can wait, it's no rush. Better to do it more slowly but more precisely.
The latest version of the .dts file (base) is provided below.
my .dts file
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Xunison Exigo Hub D50 5G";
compatible = "xunison,exigo-hub-d50-5g", "qcom,ipq5018";
aliases {
label-mac-device = &dp2;
led-boot = &led_mesh_g;
led-failsafe = &led_mesh_r;
led-running = &led_mesh_g;
led-upgrade = &led_mesh_r;
serial0 = &blsp1_uart1;
};
chosen {
bootargs = "console=ttyMSM0,115200n8 ubi.mtd=rootfs ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs rootwait swiotlb=1 coherent_pool=2M";
stdout-path = "serial0:115200n8";
};
modem {
compatible = "gpio-export";
pinctrl-names = "default";
pinctrl-0 = <&modem_pins>;
modem-power {
gpio-export,name = "modem_power_up";
gpio-export,output = <1>;
gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
};
modem-reset {
gpio-export,name = "modem_reset";
gpio-export,output = <1>;
gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button-reset {
label = "reset";
gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
button-wps {
label = "wps";
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_mesh_g: mesh-green {
label = "green:mesh";
gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
};
led_mesh_r: mesh-red {
label = "red:mesh";
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
};
l5g-green {
label = "green:5g";
gpios = <&tlmm 33 GPIO_ACTIVE_HIGH>;
};
l5g-red {
label = "red:5g";
gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
};
l4g-green {
label = "green:4g";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
};
wifi-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
};
internet-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN_ONLINE;
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
};
};
};
&soc {
msi_gicm: msi-gicm@b00a040 {
compatible = "qcom,msi-gicm";
reg = <0x0b00a040 0x8>;
msi-controller;
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>;
};
};
&switch {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy
port@0 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
};
&dp1 {
status = "okay";
nvmem-cells = <&macaddr_dp1 0>;
nvmem-cell-names = "mac-address";
label = "wan";
};
// MAC1 ---SGMII---> QCA8337 SerDes
&dp2 {
status = "okay";
nvmem-cells = <&macaddr_dp2 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
/*
&ge_phy {
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
default-state = "keep";
active-high;
};
};
};
*/
&mdio0 {
status = "okay";
};
&mdio1 {
status = "okay";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
// QCA8337 Phy0 -> LAN3
qca8337_0: ethernet-phy@0 {
reg = <0>;
};
// QCA8337 Phy1 -> LAN2
qca8337_1: ethernet-phy@1 {
reg = <1>;
};
// QCA8337 Phy3 -> LAN1
qca8337_2: ethernet-phy@2 {
reg = <2>;
};
// QCA8337 switch
switch0: ethernet-switch@17 {
compatible = "qca,qca8337";
reg = <17>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phy-mode = "sgmii";
ethernet = <&dp2>;
qca,sgmii-enable-pll;
fixed-link {
speed = <1000>;
full-duplex;
};
};
// QCA8337 Phy0 -> LAN3
port@1 {
reg = <1>;
label = "lan3";
phy-handle = <&qca8337_0>;
};
// QCA8337 Phy1 -> LAN2
port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&qca8337_1>;
};
// QCA8337 Phy3 -> LAN1
port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&qca8337_2>;
};
};
};
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board_clk {
clock-div = <4>;
clock-mult = <1>;
};
&blsp1_uart1 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&crypto {
status = "okay";
};
&cryptobam {
status = "okay";
};
&prng {
status = "okay";
};
&qfprom {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
compatible = "spi-nand";
reg = <0>;
nand-ecc-engine = <&qpic_nand>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
qcom,boot-partitions-no-subpage;
partitions {
compatible = "qcom,smem-part";
partition-0-art {
label = "0:art";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_dp1: macaddr@0 {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
reg = <0x0 0x6>;
};
macaddr_dp2: macaddr@1 {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
reg = <0x6 0x6>;
};
};
};
};
};
};
&tlmm {
button_pins: button-pins {
pins = "gpio22", "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
/*
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
*/
/* Modem Control Pins: GPIO 31 (Power) */
modem_pins: modem-pins {
mux {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds-pins {
pins = "gpio1", "gpio27", "gpio28", "gpio30", "gpio33", "gpio34", "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
mdio1_pins: mdio-state {
mdc-pins {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio-pins {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
qpic_pins: qpic-state {
clock-pins {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
cs-pins {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
data-pins {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
serial_0_pins: uart0-state {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
drive-strength = <8>;
bias-disable;
};
};
&usbphy0 {
status = "okay";
};
&usb {
status = "okay";
};
&usb_dwc {
#address-cells = <1>;
#size-cells = <0>;
dr_mode = "host";
usb_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&pcie0_phy {
status = "okay";
};
&pcie0 {
status = "okay";
perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>;
pcie@0 {
wifi@0,0 {
status = "okay";
/* QCN9074: ath11k lacks DT compatible for PCI cards */
compatible = "pci17cb,1104";
reg = <0x00010000 0 0 0 0>;
qcom,ath11k-calibration-variant = "Xunison-Exigo-Hub-D50-5G";
};
};
};
&pcie1_phy {
status = "okay";
};
&pcie1 {
status = "okay";
perst-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
msi-parent = <&msi_gicm>;
/* SDX55 standard IPQ5018 offsets */
qcom,msi-gicm-addr = <0x0b00a040>;
qcom,msi-gicm-base = <0x140>;
/* Force Gen2 for stability on the x1 slot */
max-link-speed = <2>;
pcie@0 {
reg = <0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
/* The modem binds via PCI ID, no subnode needed */
};
};
&q6v5_wcss {
firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt",
"ath11k/IPQ5018/hw1.0/m3_fw.mdt";
};
&wifi {
status = "okay";
qcom,rproc = <&q6v5_wcss>;
qcom,ath11k-calibration-variant = "Xunison-Exigo-Hub-D50-5G";
qcom,ath11k-fw-memory-mode = <1>;
};
This version creates devices / interfaces
[ 17.392382] wwan wwan0: port wwan0qcdm0 attached
[ 17.392952] wwan wwan0: port wwan0mbim0 attached
[ 17.396643] wwan wwan0: port wwan0at0 attached
but modem becomes inactive after startup
lspci -vv
0001:01:00.0 Unassigned class [ff00]: Qualcomm Technologies, Inc SDX55 [Snapdragon X55 5G]
Subsystem: Qualcomm Technologies, Inc Device 5002
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin ? routed to IRQ 42
Region 0: Memory at 80300000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at 80301000 (64-bit, non-prefetchable) [size=4K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D3 NoSoftRst+ PME-Enable+ DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable+ Count=8/32 Maskable+ 64bit+
Address: 000000000b00a040 Data: 01c2
Masking: ffffffe0 Pending: 00000000
Capabilities: [70] Express (v2) Endpoint, IntMsgNum 0
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25W TEE-IO-
DevCtl: CorrErr+ NonFatalErr+ FatalErr+ UnsupReq+
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed 16GT/s, Width x2, ASPM L0s L1, Exit Latency L0s <4us, L1 <64us
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 128 bytes, LnkDisable- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- FltModeDis-
LnkSta: Speed 5GT/s (downgraded), Width x1 (downgraded)
TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR+
10BitTagComp+ 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
FRS- TPHComp+ ExtTPHComp-
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
AtomicOpsCtl: ReqEn-
IDOReq- IDOCompl- LTR+ EmergencyPowerReductionReq-
10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
LnkCap2: Supported Link Speeds: 2.5-16GT/s, Crosslink- Retimer+ 2Retimers+ DRS-
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
Retimer- 2Retimers- CrosslinkRes: Upstream Port, FltMode-
Capabilities: [100 v2] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
ECRC- UnsupReq- ACSViol- UncorrIntErr+ BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
ECRC- UnsupReq- ACSViol- UncorrIntErr+ BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- CorrIntErr- HeaderOF-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ CorrIntErr+ HeaderOF+
AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
Capabilities: [148 v1] Secondary PCI Express
LnkCtl3: LnkEquIntrruptEn- PerformEqu-
LaneErrStat: 0
Capabilities: [168 v1] Physical Layer 16.0 GT/s
Phy16Sta: EquComplete- EquPhase1- EquPhase2- EquPhase3- LinkEquRequest-
Capabilities: [18c v1] Lane Margining at the Receiver
PortCap: Uses Driver-
PortSta: MargReady- MargSoftReady-
Capabilities: [19c v1] Transaction Processing Hints
No steering table available
Capabilities: [228 v1] Latency Tolerance Reporting
Max snoop latency: 0ns
Max no snoop latency: 0ns
Capabilities: [230 v1] L1 PM Substates
L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
PortCommonModeRestoreTime=70us PortTPowerOnTime=0us
L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
T_CommonMode=0us LTR1.2_Threshold=0ns
L1SubCtl2: T_PwrOn=10us
Capabilities: [240 v1] Data Link Feature <?>
Kernel driver in use: mhi-pci-generic
vs
fork OpenWrt
lspci -vv
Fork
0000:01:00.0 Unassigned class [ff00]: Qualcomm Device 0306
Subsystem: Qualcomm Device 5002
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin ? routed to IRQ 96
Region 0: Memory at 80300000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at 80301000 (64-bit, non-prefetchable) [size=4K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable+ Count=4/32 Maskable+ 64bit+
Address: 000000000b00a040 Data: 01c0
Masking: fffffff0 Pending: 00000000
Capabilities: [70] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25W
DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed 16GT/s, Width x2, ASPM L0s L1, Exit Latency L0s <4us, L1 <64us
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s (downgraded), Width x1 (downgraded)
TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR+
10BitTagComp+ 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
FRS- TPHComp+ ExtTPHComp-
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- 10BitTagReq- OBFF Disabled,
AtomicOpsCtl: ReqEn-
LnkCap2: Supported Link Speeds: 2.5-16GT/s, Crosslink- Retimer+ 2Retimers+ DRS-
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
Retimer- 2Retimers- CrosslinkRes: Upstream Port
Capabilities: [100 v2] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr+ BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
Capabilities: [148 v1] Secondary PCI Express
LnkCtl3: LnkEquIntrruptEn- PerformEqu-
LaneErrStat: 0
Capabilities: [168 v1] Physical Layer 16.0 GT/s <?>
Capabilities: [18c v1] Lane Margining at the Receiver <?>
Capabilities: [19c v1] Transaction Processing Hints
No steering table available
Capabilities: [228 v1] Latency Tolerance Reporting
Max snoop latency: 0ns
Max no snoop latency: 0ns
Capabilities: [230 v1] L1 PM Substates
L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
PortCommonModeRestoreTime=70us PortTPowerOnTime=0us
L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
T_CommonMode=0us LTR1.2_Threshold=0ns
L1SubCtl2: T_PwrOn=10us
Capabilities: [240 v1] Data Link Feature <?>
Kernel driver in use: mhi_q
I can manually wake up the modem and change these settings
Control: BusMaster-
Status: D3
to
Control: BusMaster+
Status: D0
Modem will "turn on" and new mhi devices / interfaces will be available. Unfortunately, that doesn't change anything, and the pcie doesn't let any traffic through.
root@OpenWrt:~# [ 88.725107] wwan0: Failed to queue TX buf (-11)
It seems problem comes from the pcie interface. I'm going to try adding an mhi section to the dts file. I'm out of ideas on what else to check..
the problem is staring you right in the face ... The "MSI Interrupt Mismatch" causing the MHI state machine to time out. Looking at your lspci comparison, the "Data" value is the clearly the problem
- OEM (Working):
Data: 01c0 - OpenWrt (Failing):
Data: 01c2
In Qualcomm's GIC mapping, 01c0 in the PCI config space translates to a different base than what you currently have. you'll need to update your pcie1 node ..
try this
&pcie1 {
/* ... existing properties ... */
/* CHANGE THIS: 0x1c0 is what the OEM uses to get 'Data: 01c0' */
qcom,msi-gicm-base = <0x1c0>;
/* Ensure the address is exactly this (from your lspci) */
qcom,msi-gicm-addr = <0x0b00a040>;
/* IMPORTANT: Also add this to prevent the link from
dropping into D3hot before the driver finishes */
pcie@0 {
reg = <0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
/* Forces the kernel to keep the power state at D0 */
pci,no-autosuspending;
};
};
EDIT
The 'Verify the MSI Mask' Notice in your OpenWrt log Masking: ffffffe0 (supporting 32 vectors) vs OEM Masking: fffffff0 (supporting 16 vectors) [4, 6]. To be safe, ensure your msi-gicm node in the DTS defines the correct number of interrupts as well.
The Math for the D50:
- OEM Data:
0x1c0(decimal 448). - GIC SPI Index: 448 - 32 = 416
- Your current setting: 160 + 32 = 192 (0xC0 in hex)
Change your interrupts property to 416 to align with the OEM hardware mapping:
&soc {
msi_gicm: msi-gicm@b00a040 {
compatible = "qcom,msi-gicm";
reg = <0x0b00a040 0x8>;
msi-controller;
interrupt-parent = <&intc>;
/* 416 + 32 = 448 (0x1c0) */
interrupts = <GIC_SPI 416 IRQ_TYPE_EDGE_RISING>;
};
};
and your pcie1
&pcie1 {
status = "okay";
perst-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
msi-parent = <&msi_gicm>;
/* SDX55 standard IPQ5018 offsets */
qcom,msi-gicm-addr = <0x0b00a040>;
/* CHANGE THIS: 0x1c0 is required to get 'Data: 01c0' in lspci */
qcom,msi-gicm-base = <0x1c0>;
/* Force Gen2 for stability on the x1 slot */
max-link-speed = <2>;
pcie@0 {
reg = <0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
};
};
1 Like
Those settings didn't help, but I decided to try a different option.
&soc
&soc {
msi_gicm: msi-gicm@b00a040 {
compatible = "qcom,msi-gicm";
reg = <0x0b00a040 0x8>;
msi-controller;
interrupt-parent = <&intc>;
/* 416 + 32 = 448 (0x1c0) */
interrupts = <GIC_SPI 416 IRQ_TYPE_EDGE_RISING>;
};
};
&pcie1
&pcie1 {
status = "okay";
perst-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
msi-parent = <&msi_gicm>;
qcom,msi-gicm-addr = <0x0b00a040>;
qcom,msi-gicm-base = <0x1c0>;
msi-map = <0 &msi_gicm 0 4>;
max-link-speed = <2>;
pcie@0 {
reg = <0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
/* Forces the kernel to keep the power state at D0 */
pci,no-autosuspending;
/*
* PCI Vendor:Device.
* Driver mhi-pci-generic.
*/
modem@0,0 {
compatible = "pci17cb,0306";
reg = <0x00000000 0 0 0 0>;
};
};
};
We have some errors, but there have also been changes to the settings and functionality.
lspci -vv
0001:01:00.0 Unassigned class [ff00]: Qualcomm Technologies, Inc SDX55 [Snapdragon X55 5G]
Subsystem: Qualcomm Technologies, Inc Device 5002
Device tree node: /sys/firmware/devicetree/base/soc@0/pcie@80000000/pcie@0/modem@0,0
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Region 0: Memory at 80300000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at 80301000 (64-bit, non-prefetchable) [size=4K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+
Address: 0000000000000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [70] Express (v2) Endpoint, IntMsgNum 0
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25W TEE-IO-
DevCtl: CorrErr+ NonFatalErr+ FatalErr+ UnsupReq+
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed 16GT/s, Width x2, ASPM L0s L1, Exit Latency L0s <4us, L1 <64us
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 128 bytes, LnkDisable- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- FltModeDis-
LnkSta: Speed 5GT/s (downgraded), Width x1 (downgraded)
TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR+
10BitTagComp+ 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
FRS- TPHComp+ ExtTPHComp-
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
AtomicOpsCtl: ReqEn-
IDOReq- IDOCompl- LTR+ EmergencyPowerReductionReq-
10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
LnkCap2: Supported Link Speeds: 2.5-16GT/s, Crosslink- Retimer+ 2Retimers+ DRS-
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
Retimer- 2Retimers- CrosslinkRes: Upstream Port, FltMode-
Capabilities: [100 v2] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
ECRC- UnsupReq- ACSViol- UncorrIntErr+ BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
ECRC- UnsupReq- ACSViol- UncorrIntErr+ BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- CorrIntErr- HeaderOF-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ CorrIntErr+ HeaderOF+
AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
Capabilities: [148 v1] Secondary PCI Express
LnkCtl3: LnkEquIntrruptEn- PerformEqu-
LaneErrStat: 0
Capabilities: [168 v1] Physical Layer 16.0 GT/s
Phy16Sta: EquComplete- EquPhase1- EquPhase2- EquPhase3- LinkEquRequest-
Capabilities: [18c v1] Lane Margining at the Receiver
PortCap: Uses Driver-
PortSta: MargReady- MargSoftReady-
Capabilities: [19c v1] Transaction Processing Hints
No steering table available
Capabilities: [228 v1] Latency Tolerance Reporting
Max snoop latency: 0ns
Max no snoop latency: 0ns
Capabilities: [230 v1] L1 PM Substates
L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
PortCommonModeRestoreTime=70us PortTPowerOnTime=0us
L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
T_CommonMode=0us LTR1.2_Threshold=0ns
L1SubCtl2: T_PwrOn=10us
Capabilities: [240 v1] Data Link Feature <?>
dmesg | grep -i mhi
[ 16.163863] mhi-pci-generic 0001:01:00.0: MHI PCI device found: quectel-rm5xx
[ 16.163941] mhi-pci-generic 0001:01:00.0: BAR 0 [mem 0x80300000-0x80300fff 64bit]: assigned
[ 16.170058] mhi-pci-generic 0001:01:00.0: enabling device (0000 -> 0002)
[ 16.178289] mhi-pci-generic 0001:01:00.0: Error allocating MSI vectors -524
[ 16.185120] mhi-pci-generic 0001:01:00.0: probe with driver mhi-pci-generic failed with error -524
[ 18.173305] mhi mhi0: Requested to power ON
[ 18.173387] mhi mhi0: Power on setup success
[ 19.172610] mhi mhi0: Wait for device to enter SBL or Mission mode
[ 31.178323] mhi_init Quectel_Linux_PCIE_MHI_Driver_V1.3.8
[ 31.179275] mhi_pci_probe pci_dev->name = 0001:01:00.0, domain=1, bus=1, slot=0, vendor=17CB, device=0306
[ 31.183542] [I][mhi0][mhi_arch_set_bus_request] Setting bus request to index 1
[ 31.183603] mhi_q 0001:01:00.0: BAR 0 [mem 0x80300000-0x80300fff 64bit]: assigned
[ 31.192747] [E][mhi0][mhi_init_pci_dev] Failed to enable MSI, ret=-524, msi_required=4
[ 31.205364] [I][mhi0][mhi_arch_set_bus_request] Setting bus request to index 0
[ 31.205417] mhi_q 0001:01:00.0: probe with driver mhi_q failed with error -524
@georgem83, maybe you have some ideas?
should be
msi-map = <0x0 &msi_gicm 0x0 0xffff>;
and remove msi-parent if using msi-map .. as msi-map is more precise
pcie1
&pcie1 {
status = "okay";
perst-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
msi-map = <0x0 &msi_gicm 0x0 0xffff>;
qcom,msi-gicm-addr = <0x0b00a040>;
qcom,msi-gicm-base = <0x1c0>;
max-link-speed = <2>;
pcie@0 {
reg = <0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
pci,no-autosuspending;
};
};
Unfortunately, nothing has changed.
Edit:
I take back what I wrote later. I don't even know anymore how this modem is supposed to be detected correctly. I give up... I have no idea what to do next.
If it helps, I have one of these delivered yesterday running OpenWRT 23.05 straight out the box. Everything is working including the NPU, just doesn't support sae-mixed wifi. I took a dump of the 17 mtd partitions this morning.
it's running a QSDK out of the box, it was reported by IceG in their initial post.
IPQ50xx wasn't supported by OpenWRT back in 23.05.
I'm assuming there's no known way to get the drivers etc ported into the main.
that's exactly what this thread is about ...