So this is interesting, I was going over the FCC photo's and didn't see it. Why in the world would they be using this chip though? It's a 12 port SERDES SoC (system on a chip) that can do everything the main SoC can do (probably slower though), but then there's the rtl9311 with dual mips cores.
Anyway, we are working heavily on supporting the realtek SoC (as a SoC) in this thread Support for RTL838x based managed switches and have my WIP branch here https://gitlab.com/olliver/openwrt/openwrt/-/commits/dev/realtek-wip/ (which is always in flux 
anyway.
I'd be curious how they strapped this rtl9301 though; as you can, with pull-ups/downs configure the chip to be a 'dumb' switch. But then, how it would look in the DTS, I don't know.
I think from a linux PoV, you'd just have a 'dumb' switch chip. Then, if offloading those L2 and L3 features are desires, that'l be interesting. Normally, we configure the RTL9301 via lexra-bus register addresses. In this case, we'd need to write to some other bus. THe RTL9301 can be connected via a slave SPI interface. Is thats how they are talking to the chip? I wonder how registers are accessed. Probalby via their 16bit address, which is all we have access too. Thinking too much out loud now but that's something we'd have to think about in writing the proper rtl9301 DSA driver, that it can be talked to via SPI or via registers.