Adding OpenWrt support for Zyxel XMG1930-30HP

I added the PHY ID of the recognized PHY (10G PHY, probably Aquantia 413C, used in port 25-28) to your polling list and suddenly the LEDs lit up for 1G connections as well, not just for 10G and 2.5G connections. So this is an improvement. Still no traffic when watching with tcpdump, but progress nonetheless. Other ports (1-24 with 2.5G PHY, 29+30 with SFP) were not tested.

With all 10G ports connected (port 25@1G, port 26@2.5G, port 27@10G, port 28@10G) and the remote side indicating link up, the SDS_EXT status looks like this:

/sys/kernel/debug/realtek_otto_serdes/serdes.8/registers
SDS_EXT    : 0000 0000 0000 0000 0000 0000 0000 0003 283F 4000 0000 0000 0004 326A 0332 1162 2ABD 0000 0000 0000 0000 0000 0000 0000 0015 02BC 0000 0000 0000 0100 0100 0000 
/sys/kernel/debug/realtek_otto_serdes/serdes.9/registers
SDS_EXT    : 0000 0000 0000 0000 0000 0000 0000 0003 283F 4000 0000 0000 0004 326A 0332 1162 2ABD 0000 0000 0000 0000 0000 0000 0000 0015 02BC 0000 0000 0000 0100 0100 0000 
/sys/kernel/debug/realtek_otto_serdes/serdes.10/registers
SDS_EXT    : 0000 0000 0000 0000 0000 0000 0000 0003 283F 4000 0000 0000 0004 326A 0332 1162 2ABD 0000 0000 0000 0000 0000 0000 0000 0015 02BC 0000 0000 0000 0100 0100 0000 
/sys/kernel/debug/realtek_otto_serdes/serdes.11/registers
SDS_EXT    : 0000 0000 0000 0000 0000 0000 0000 0003 283F 4000 0000 0000 0004 326A 0332 1162 2ABD 0000 0000 0000 0000 0000 0000 0000 0015 02BC 0000 0000 0000 0100 0100 0000 

Port 25 is SDS 8, port 26 is SDS 9, port 27 is SDS 10, port 28 is SDS 11.

If I'm not mistaken, this should be a SerDes issue then. I can refresh my calibration patch and you can have a try if that improves anything. This didn't had any effect on my devices so far but they are already working mostly. I remember it helped a bit on Plasmacloud devices.

EDIT: There is also some patching still missing, this could also help. I can prepare that too.

Seems like this needs quite some differentiation here, see https://github.com/plappermaul/realtek-doc/blob/3261cf2e6150a519a1d50d1afecd7ad98644cdd6/sources/rtk-dms1250/src/hal/phy/phy_rtl9310.c#L255

Even on my devices where everything is working, the registers you mentioned are 0x0100

@hailfinger Could you try with the three top commits from https://github.com/jonasjelonek/openwrt/commits/realtek/zyxel-xs1930/ ? This add some patching from the SDK and may help. At least worth a try.

Thank you, I’ll try that on Monday.

Rebase on main and add your top three comments or just add your top three comments? I can do both if you think that would help.

Should be fine without a rebase, not sure if they apply cleanly. Apart from that, there weren‘t any critical changes merged in the meantime

They applied cleanly without rebase.

Sadly, no directly visible change. I didn’t have time to test with a 10G connection to another computer/switch, just a 10G loopback patch cable between two ports of the same switch. In theory, the first packet on the switch should have caused a storm due to the loop. No such storm happened when I sent a broadcast packet (ARP request for another machine) locally.

I did dump the SDS registers again and will check for changes.

Sad :frowning:

I'm currently taking a deeper dive into the setup process with the bare information the SDK provides. The goal is to have a comprehensive process of configuring different parts of the RX and TX chains. While this may not make it work instantly on every device, it gives better control knobs to work with. But this will still take a few days.

I can quickly compare your SerDes dump with mine later just to check for obvious issues. But don't expect groundbreaking findings there.

After rebasing against latest master, the last two patches do not apply anymore. Is there another branch I can pick from or has an alternative patch already been merged?

Only some cleanup and minor stuff has been merged, the next stuff for RTL931x is still in my queue. I just updated the branch to apply again, but no functional change so far. Still working on the rest.

Not sure though, SerDes seems to have link according to your previous dump (see page DTE_EXT/0x5 bit 12 and DTE/0x4 bit 2, refer to https://github.com/plappermaul/realtek-doc/blob/3261cf2e6150a519a1d50d1afecd7ad98644cdd6/sources/rtk-dms1250/src/hal/phy/phy_rtl9310.c#L255)

Thank you, I updated my tree with your updated patches. Will retry again in the next few days.

Hm yes, this is weird, I’ll get another dump with the latest tree and I’ll also do a full compare of all SDS settings between dumps.

I just pushed another commit where I made an early attempt of adding the calibration usable again. Probably try that too.