Ive tried about everything here, i have the original QSDK dts files, and tried to modify them to be compliant with OpenWRT, no matter what... no joy Ive attached both if someone can maybe sort out the DTS i can manage the rest.
/dts-v1/;
#include "ipq6018.dtsi"
#include "ipq6018-cp-cpu.dtsi"
#include "ipq6018-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Yuncore AX1750";
compatible = "yuncore,ax1750", "qcom,ipq6018";
aliases {
serial0 = &blsp1_uart3;
ethernet0 = &dp1;
ethernet1 = &dp2;
ethernet2 = &dp3;
ethernet3 = &dp4;
ethernet4 = &dp5;
};
chosen {
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&tlmm 79 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@35 {
label = "led_5g";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led@37 {
label = "led_2g";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led@50 {
label = "led_usb0";
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@23 {
label = "led_s1";
gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@24 {
label = "led_s2";
gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@25 {
label = "led_s3";
gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@31 {
label = "led_internet";
gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@32 {
label = "led_sys";
gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
lte@27 {
label = "lte_power";
gpio = <&tlmm 27 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
};
&tlmm {
pinctrl-0 = <&sd_ldo_pins>;
pinctrl-names = "default";
uart_pins: uart_pins {
mux {
pins = "gpio44", "gpio45";
function = "blsp2_uart";
drive-strength = <8>;
bias-pull-down;
};
};
sd_ldo_pins: sd_ldo_pins {
mux {
pins = "gpio66";
function = "gpio";
drive-strength = <2>;
bias-disable;
output-low;
};
};
spi_0_pins: spi_0_pins {
mux {
pins = "gpio38", "gpio39", "gpio40", "gpio41";
function = "blsp0_spi";
drive-strength = <8>;
bias-pull-down;
};
};
spi_1_pins: spi_1_pins {
mux {
pins = "gpio69", "gpio71", "gpio72";
function = "blsp1_spi";
drive-strength = <8>;
bias-pull-down;
};
spi_cs {
pins = "gpio70";
function = "blsp1_spi";
drive-strength = <8>;
bias-disable;
};
quartz_interrupt {
pins = "gpio78";
function = "gpio";
input;
bias-disable;
};
quartz_reset {
pins = "gpio79";
function = "gpio";
output-low;
bias-disable;
};
};
sd_pins: sd_pins {
mux {
pins = "gpio62";
function = "sd_card";
drive-strength = <8>;
bias-pull-up;
};
};
extcon_usb_pins: extcon_usb_pins {
mux {
pins = "gpio26";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
};
button_pins: button_pins {
wps_button {
pins = "gpio9";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
reset_button {
pins = "gpio19";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio64";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio65";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
mux_2 {
pins = "gpio75";
function = "gpio";
bias-pull-up;
};
mux_3 {
pins = "gpio77";
function = "gpio";
bias-pull-up;
};
};
leds_pins: leds_pins {
led_5g {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio37";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_usb0 {
pins = "gpio50";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_s1 {
pins = "gpio23";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_s2 {
pins = "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_s3 {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_internet {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio32";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte_power {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
hsuart_pins: hsuart_pins {
mux {
pins = "gpio71", "gpio72", "gpio69", "gpio70";
function = "blsp1_uart";
drive-strength = <8>;
bias-disable;
};
};
btcoex_pins: btcoex_pins {
mux_0 {
pins = "gpio51";
function = "pta1_1";
drive-strength = <6>;
bias-pull-down;
};
mux_1 {
pins = "gpio53";
function = "pta1_0";
drive-strength = <6>;
bias-pull-down;
};
mux_2 {
pins = "gpio52";
function = "pta1_2";
drive-strength = <6>;
bias-pull-down;
};
};
};
&blsp1_uart3 {
pinctrl-0 = <&serial_3_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:SBL1";
reg = <0x00000000 0x000c0000>;
};
partition@c0000 {
label = "0:MIBIB";
reg = <0x000c0000 0x000d0000>;
};
partition@d0000 {
label = "0:BOOTCONFIG";
reg = <0x000d0000 0x000f0000>;
};
partition@f0000 {
label = "0:BOTOCONFIG1";
reg = <0x000f0000 0x000110000>;
};
partition@11000 {
label = "0:QSEE_1";
reg = <0x00110000 0x002b0000>;
};
partition@2b000 {
label = "0:QSEE";
reg = <0x002b0000 0x00450000>;
};
partition@450000 {
label = "0:DEVCFG_1";
reg = <0x00450000 0x00460000>;
};
partition@460000 {
label = "0:DEVCFG";
reg = <0x00460000 0x00470000>;
};
partition@470000 {
label = "0:RPM_1";
reg = <0x00470000 0x004b0000>;
};
partition@4b0000 {
label = "0:RPM";
reg = <0x004b0000 0x004f0000>;
};
partition@4f0000 {
label = "0:CDT_1";
reg = <0x004f0000 0x00500000>;
};
partition@500000 {
label = "0:CDT";
reg = <0x00500000 0x00510000>;
};
partition@510000 {
label = "0:APPSBLENV";
reg = <0x00510000 0x00520000>;
};
partition@520000 {
label = "0:APPSBL_1";
reg = <0x00520000 0x005c0000>;
};
partition@5c0000 {
label = "0:APPSBL";
reg = <0x005c0000 0x00660000>;
};
partition@660000 {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
label = "0:ART";
reg = <0x00660000 0x006a0000>;
macaddr_eth1: macaddr@0 {
reg = <0x3a001000 0x200>;
};
macaddr_eth2: macaddr@1 {
reg = <0x3a001200 0x200>;
};
macaddr_eth3: macaddr@2 {
reg = <0x3a001400 0x200>;
};
macaddr_eth4: macaddr@3 {
reg = <0x3a001600 0x200>;
};
macaddr_eth0: macaddr@4 {
reg = <0x3a001800 0x200>;
};
};
};
};
};
&dp1 {
status = "okay";
phy-handle = <&qca8081>;
nvmem-cells = <&macaddr_eth0>;
nvmem-cell-names = "mac-address";
label = "wan";
};
&dp2 {
status = "okay";
phy-handle = <&qca8072_0>;
nvmem-cells = <&macaddr_eth1>;
nvmem-cell-names = "mac-address";
label = "lan1";
};
&dp3 {
status = "okay";
phy-handle = <&qca8072_1>;
nvmem-cells = <&macaddr_eth2>;
nvmem-cell-names = "mac-address";
label = "lan2";
};
&dp4 {
status = "okay";
phy-handle = <&qca8072_2>;
nvmem-cells = <&macaddr_eth3>;
nvmem-cell-names = "mac-address";
label = "lan3";
};
&dp5 {
status = "okay";
phy-handle = <&qca8072_3>;
nvmem-cells = <&macaddr_eth4>;
nvmem-cell-names = "mac-address";
label = "lan4";
};
&edma {
status = "okay";
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 75 0 &tlmm 77 1>;
/* reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>; */
reset-delay-us = <10000>;
reset-post-delay-us = <50000>;
ethernet-phy-package@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,qca8075-package";
reg = <0>;
qcom,package-mode = "psgmii";
qca8072_0: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
qca8072_1: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <2>;
};
qca8072_2: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <3>;
};
qca8072_3: ethernet-phy@4 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <4>;
};
};
qca8081: ethernet-phy@24 {
compatible = "ethernet-phy-id004d.d101";
reg = <24>;
reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
};
};
&sdhc_1 {
pinctrl-0 = <&sd_pins>;
pinctrl-names = "default";
status = "okay";
vqmmc-supply = <&ipq6018_l2>;
cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
};
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT3 | ESS_PORT4)>;
switch_wan_bmp = <ESS_PORT5>;
switch_mac_mode = <MAC_MODE_PSGMII>;
switch_mac_mode1 = <MAC_MODE_SGMII_PLUS>;
port3_pcs_channel = <4>;
qcom,port_phyinfo {
port@1 {
port_id = <1>;
phy_address = <4>;
};
port@2 {
port_id = <2>;
phy_address = <3>;
};
port@3 {
port_id = <3>;
phy_address = <2>;
};
port@4 {
port_id = <4>;
phy_address = <1>;
};
port@5 {
port_id = <5>;
phy_address = <24>;
port_mac_sel = "QGMAC_PORT";
};
};
};
&qpic_nand {
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "nand_data";
reg = <0x0000000 0x10000000>;
};
};
};
};
&blsp1_uart3 {
pinctrl-0 = <&uart_pins>;
pinctrl-names = "default";
status = "ok";
};
&blsp1_uart2 {
pinctrl-0 = <&hsuart_pins &btcoex_pins>;
pinctrl-names = "default";
dmas = <&blsp_dma 2>,
<&blsp_dma 3>;
dma-names = "tx", "rx";
status = "ok";
};
&qpic_bam {
status = "ok";
};
&ssphy_0 {
status = "ok";
};
&qusb_phy_0 {
status = "ok";
};
&qusb_phy_1 {
status = "ok";
};
&usb2 {
status = "ok";
};
&usb3 {
status = "ok";
};
&pcie_phy {
status = "ok";
};
&pcie0 {
status = "ok";
/* perst-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; */
};
};
and the original qsdk dts file
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq6018.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "qcom,ipq6018-cp01", "qcom,ipq6018";
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart3;
serial1 = &blsp1_uart2;
sdhc2 = &sdhc_2;
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
ethernet2 = "/soc/dp3";
ethernet3 = "/soc/dp4";
ethernet4 = "/soc/dp5";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
};
};
&tlmm {
pinctrl-0 = <&sd_ldo_pins>;
pinctrl-names = "default";
uart_pins: uart_pins {
mux {
pins = "gpio44", "gpio45";
function = "blsp2_uart";
drive-strength = <8>;
bias-pull-down;
};
};
sd_ldo_pins: sd_ldo_pins {
mux {
pins = "gpio66";
function = "gpio";
drive-strength = <2>;
bias-disable;
output-low;
};
};
spi_0_pins: spi_0_pins {
mux {
pins = "gpio38", "gpio39", "gpio40", "gpio41";
function = "blsp0_spi";
drive-strength = <8>;
bias-pull-down;
};
};
spi_1_pins: spi_1_pins {
mux {
pins = "gpio69", "gpio71", "gpio72";
function = "blsp1_spi";
drive-strength = <8>;
bias-pull-down;
};
spi_cs {
pins = "gpio70";
function = "blsp1_spi";
drive-strength = <8>;
bias-disable;
};
quartz_interrupt {
pins = "gpio78";
function = "gpio";
input;
bias-disable;
};
quartz_reset {
pins = "gpio79";
function = "gpio";
output-low;
bias-disable;
};
};
qpic_pins: qpic_pins {
data_0 {
pins = "gpio15";
function = "qpic_pad0";
drive-strength = <8>;
bias-pull-down;
};
data_1 {
pins = "gpio12";
function = "qpic_pad1";
drive-strength = <8>;
bias-pull-down;
};
data_2 {
pins = "gpio13";
function = "qpic_pad2";
drive-strength = <8>;
bias-pull-down;
};
data_3 {
pins = "gpio14";
function = "qpic_pad3";
drive-strength = <8>;
bias-pull-down;
};
data_4 {
pins = "gpio5";
function = "qpic_pad4";
drive-strength = <8>;
bias-pull-down;
};
data_5 {
pins = "gpio6";
function = "qpic_pad5";
drive-strength = <8>;
bias-pull-down;
};
data_6 {
pins = "gpio7";
function = "qpic_pad6";
drive-strength = <8>;
bias-pull-down;
};
data_7 {
pins = "gpio8";
function = "qpic_pad7";
drive-strength = <8>;
bias-pull-down;
};
qpic_pad {
pins = "gpio1", "gpio3", "gpio4",
"gpio10", "gpio11", "gpio17";
function = "qpic_pad";
drive-strength = <8>;
bias-pull-down;
};
};
sd_pins: sd_pins {
mux {
pins = "gpio62";
function = "sd_card";
drive-strength = <8>;
bias-pull-up;
};
};
extcon_usb_pins: extcon_usb_pins {
mux {
pins = "gpio26";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
};
button_pins: button_pins {
wps_button {
pins = "gpio9";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
reset_button {
pins = "gpio19";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio64";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio65";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
mux_2 {
pins = "gpio75";
function = "gpio";
bias-pull-up;
};
mux_3 {
pins = "gpio77";
function = "gpio";
bias-pull-up;
};
};
leds_pins: leds_pins {
led_5g {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio37";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_usb0 {
pins = "gpio50";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_s1 {
pins = "gpio23";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_s2 {
pins = "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_s3 {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_internet {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio32";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
lte_power {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
hsuart_pins: hsuart_pins {
mux {
pins = "gpio71", "gpio72", "gpio69", "gpio70";
function = "blsp1_uart";
drive-strength = <8>;
bias-disable;
};
};
btcoex_pins: btcoex_pins {
mux_0 {
pins = "gpio51";
function = "pta1_1";
drive-strength = <6>;
bias-pull-down;
};
mux_1 {
pins = "gpio53";
function = "pta1_0";
drive-strength = <6>;
bias-pull-down;
};
mux_2 {
pins = "gpio52";
function = "pta1_2";
drive-strength = <6>;
bias-pull-down;
};
};
};
&soc {
extcon_usb: extcon_usb {
pinctrl-0 = <&extcon_usb_pins>;
pinctrl-names = "default";
id-gpio = <&tlmm 26 GPIO_ACTIVE_LOW>;
status = "ok";
};
mdio: mdio@90000 {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>;
status = "ok";
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
phy4: ethernet-phy@4 {
reg = <0x18>;
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a001000 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0>;
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <1>;
phy-mode = "sgmii";
};
dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <2>;
phy-mode = "sgmii";
};
dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <3>;
phy-mode = "sgmii";
};
dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <24>;
phy-mode = "sgmii";
};
nss-macsec0 {
compatible = "qcom,nss-macsec";
phy_addr = <0x18>;
phy_access_mode = <0>;
mdiobus = <&mdio>;
};
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x20>; /* wan port bitmap */
switch_inner_bmp = <0xc0>; /*inner port bitmap*/
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <0x18>;
port_mac_sel = "QGMAC_PORT";
};
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
reset {
label = "reset";
linux,code = <KEY_POWER>;
gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@35 {
label = "led_5g";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led@37 {
label = "led_2g";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led@50 {
label = "led_usb0";
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@23 {
label = "led_s1";
gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@24 {
label = "led_s2";
gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@25 {
label = "led_s3";
gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@31 {
label = "led_internet";
gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@32 {
label = "led_sys";
gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
lte@27 {
label = "lte_power";
gpio = <&tlmm 27 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
};
&blsp1_uart3 {
pinctrl-0 = <&uart_pins>;
pinctrl-names = "default";
status = "ok";
};
&spi_0 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
&blsp1_uart2 {
pinctrl-0 = <&hsuart_pins &btcoex_pins>;
pinctrl-names = "default";
dmas = <&blsp_dma 2>,
<&blsp_dma 3>;
dma-names = "tx", "rx";
status = "ok";
};
&spi_1 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_1_pins>;
pinctrl-names = "default";
cs-select = <0>;
quartz-reset-gpio = <&tlmm 79 1>;
status = "disabled";
spidev1: spi@1 {
compatible = "qca,spidev";
reg = <0>;
spi-max-frequency = <24000000>;
};
};
&qpic_bam {
status = "ok";
};
&nand {
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "ok";
};
&sdhc_2 {
pinctrl-0 = <&sd_pins>;
pinctrl-names = "default";
cd-gpios = <&tlmm 62 1>;
sd-ldo-gpios = <&tlmm 66 0>;
vqmmc-supply = <&ipq6018_l2_corner>;
status = "ok";
};
&ssphy_0 {
status = "ok";
};
&qusb_phy_0 {
status = "ok";
};
&qusb_phy_1 {
status = "ok";
};
&usb2 {
status = "ok";
};
&usb3 {
status = "ok";
};
&nss_crypto {
status = "ok";
};
&pcie_phy {
status = "ok";
};
&pcie0 {
status = "ok";
};
&qpic_lcd {
status = "ok";
};
&qpic_lcd_panel {
status = "ok";
};
&wifi0 {
qcom,board_id = <0x11>;
};