Adding OpenWrt support for Linksys EA7500 v2

farawayso · June 24, 2019, 3:52pm

Mtk7621+mt7615n*2 flash128m+ram256m
This is TTL info

===================================================================
                MT7621   stage1 code 10:33:11 (ASIC)
                CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL2 FB_DL: 0x14, 1/0 = 679/345 51000000
PLL3 FB_DL: 0x15, 1/0 = 636/388 55000000
PLL4 FB_DL: 0x1b, 1/0 = 556/468 6D000000
do DDR setting..[00320381]
Apply DDR3 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000E:|    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1
000F:|    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1    0
0010:|    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0
0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
rank 0 coarse = 16
rank 0 fine = 40
B:|    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0
opt_dle value:9
DRAMC_R0DELDLY[018]=00001E1F
==================================================================
                RX      DQS perbit delay software calibration 
==================================================================
1.0-15 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    12 3 12 6 10 3 12 2 0 7 
10 |    1 11 5 10 1 9 
--------------------------------------

==================================================================
2.dqs window
x=pass dqs delay value (min~max)center 
y=0-7bit DQ of every group
input delay![](https://www.right.com.cn/forum/static/image/smiley/default/biggrin.gif)QS0 =31 DQS1 = 30
==================================================================
bit     DQS0     bit      DQS1
0  (1~57)29  8  (3~55)29
1  (1~55)28  9  (1~56)28
2  (1~61)31  10  (1~56)28
3  (1~57)29  11  (2~58)30
4  (1~62)31  12  (1~59)30
5  (1~56)28  13  (1~60)30
6  (0~60)30  14  (1~59)30
7  (1~60)30  15  (1~58)29
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    14 6 12 8 10 6 13 3 1 9 
10 |    3 11 5 10 1 10 
==================================================================
==================================================================
     TX  perbyte calibration 
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000 
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
DQ loop=15, cmp_err_1 = ffff01aa
DQ loop=14, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=14,  finish count=1 
dqs_perbyte_dly.last_dqdly_pass[1]=14,  finish count=2 
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
20,data:88
[EMI] DRAMC calibration passed

===================================================================
                MT7621   stage1 code done 
                CPU=50000000 HZ BUS=16666666 HZ
===================================================================

U-Boot 1.1.3 (Aug  5 2016 - 15:06:22)

SERCOMM v1.03.0, Release date: 2016/08/05

Board: Ralink APSoC DRAM:  256 MB
relocate_code Pointer at: 8ffa8000

Config XHCI 40M PLL 
Allocate 16 byte aligned buffer: 8ffdf070
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [C2 F1 80 95 02]
Device found in MTK table, ID: c2f1, EXT_ID: 809502
Support this Device in MTK table! c2f1 
select_chip
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 1023
load fact bbt success
[mtk_nand] probe successfully!
mtd->writesize=2048 mtd->oobsize=64,    mtd->erasesize=131072  devinfo.iowidth=8
..============================================ 
Ralink UBoot Version: 5.0.0.0
-------------------------------------------- 
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection 
DRAM_TYPE: DDR3 
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: NAND Flash
Date:Aug  5 2016  Time:15:06:22
============================================ 
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768 

##### The CPU freq = 880 MHZ #### 
estimate memory size =256 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL

Please choose the operation: 
   1: Load system code to SDRAM via TFTP. 
   2: Load system code then write to Flash via TFTP. 
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial. 
   9: Load Boot Loader code then write to Flash via TFTP.

anon50098793 · June 24, 2019, 5:16pm

Quick look and i'm not finding any support for the wifi / equivalent boards... ( edit: not sure how i got this list.... but it's not right... maybe searched wikidev-or-toh for mt6715n see @Borromini 's post below for accurate info )

ASUS_RT-AC65P
ASUS_RT-AC85P
ASUS_RT-AC85U
ASUS_RT-N800HP
D-Link_DIR-867_rev_A1
D-Link_DIR-878_rev_A1
D-Link_DIR-882_rev_A1
Linksys_EA7400_v2
Linksys_EA8100
Linksys_RE9000
Motorola_MR1700
Motorola_MR2600
Netgear_Nighthawk_AC2100
Netgear_Nighthawk_AC2400
Netgear_R6700_v2
Netgear_R6800
Netgear_R6900v2
TP-LINK_RE650_v1.x
[snip]

You might try searching here for any threads relating to some common boards from the list NOTabove but below.

( or MT7615N on the wiki )

i'd guess it's going to be a difficult one. ( edit: guessed wrong )

slh · June 24, 2019, 5:58pm

mt7615n support has been added to mainline mt76 for kernel 5.2, it's just a matter of time until it becomes available for OpenWrt as well. Be aware that mt7615n support is still very new and might not be as mature or performant as you'd like for now.

farawayso · June 25, 2019, 4:13am

And Linksys Ea7500 V2 of hardware same to Netgear R6800 of hardware.
Have usb2.0 and usb3.0

Borromini · July 13, 2019, 8:04am

@anon50098793 There are quite a few mt7621 boards supported already - Netgear R6220 and R6350 (the latter with mt7615 wireless), Asus RT-AC57U (just added to master), D-Link DIR-860L rev. B1, ...

Just take a look at target/linux/image/mt7621.mk to get an idea of how many mt7621 based routers are supported already..

Felix has has been adding early mt7615 support to the mt76 tree steadily and it has already been pulled into master.

mt76: update to the latest version, adds preliminary mt7615 support

@slh Since OpenWrt pulls from the mac80211 stack and separate drivers (at least mwlwifi, ath10k and mt76 get sourced from outside the upstream kernel tree), it doesn't depend on the wireless stack that comes with the kernel releases themselves. There's no impediment to running more a more recent wireless stack on e.g. 4.14.

See Hauke's v4.19 mac80211 backport for 19.07 also.

I'm running a personal pre-19.07 build here with Hauke's patch and Felix's recent mt76 master commits cherry-picked, e.g..

jackcolentern · August 2, 2019, 6:35pm

Hi, I am trying to get Openwrt working on Linksys EA7500 V2, spec:

MT7621N
MT7615 Wifi chip
128MB NAND
256MB RAM

For now I can get the initramfs to boot and wired network is working, however, I cant seems to make it recognize the MT7615 chip, (lspci returns empty)

I appreciate any help, thanks in advance!

Openwrt bootlog

dmesg
[    0.000000] Linux version 4.14.132 (jksl@jksl-ZenBook-Pro-15-UX550GDX-UX580GD) (gcc version 7.4.0 (OpenWrt GCC 7.4.0 r10588-7b73cad7be)) #0 SMP Tue Jul 30 13:00:52 2019
[    0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[    0.000000] MIPS: machine is Linksys EA7500 V2
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 10000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x000000000fffffff]
[    0.000000]   HighMem  empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x000000000fffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
[    0.000000] On node 0 totalpages: 65536
[    0.000000] free_area_init_node: node 0, pgdat 805ee4c0, node_mem_map 81003000
[    0.000000]   Normal zone: 576 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 65536 pages, LIFO batch:15
[    0.000000] random: get_random_bytes called from start_kernel+0x9c/0x4d8 with crng_init=0
[    0.000000] percpu: Embedded 14 pages/cpu s26064 r8192 d23088 u57344
[    0.000000] pcpu-alloc: s26064 r8192 d23088 u57344 alloc=14*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 64960
[    0.000000] Kernel command line: console=ttyS0,115200 rootfstype=squashfs,jffs2
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Writing ErrCtl register=00012400
[    0.000000] Readback ErrCtl register=00012400
[    0.000000] Memory: 248692K/262144K available (4784K kernel code, 251K rwdata, 1036K rodata, 4284K init, 254K bss, 13452K reserved, 0K cma-reserved, 0K highmem)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000] NR_IRQS: 256
[    0.000000] CPU Clock: 880MHz
[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[    0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[    0.007806] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[    0.073979] pid_max: default: 32768 minimum: 301
[    0.078799] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.085308] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.094475] Hierarchical SRCU implementation.
[    0.099697] smp: Bringing up secondary CPUs ...
[    0.106300] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.106310] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.106321] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.106457] CPU1 revision is: 0001992f (MIPS 1004Kc)
[    0.164455] Synchronize counters for CPU 1: done.
[    0.200175] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.200184] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.200193] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.200268] CPU2 revision is: 0001992f (MIPS 1004Kc)
[    0.255683] Synchronize counters for CPU 2: done.
[    0.287536] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.287545] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.287553] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.287631] CPU3 revision is: 0001992f (MIPS 1004Kc)
[    0.340866] Synchronize counters for CPU 3: done.
[    0.370732] smp: Brought up 1 node, 4 CPUs
[    0.378714] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.388512] futex hash table entries: 1024 (order: 3, 32768 bytes)
[    0.394920] pinctrl core: initialized pinctrl subsystem
[    0.401514] NET: Registered protocol family 16
[    0.409240] rt2880-pinmux pinctrl: error claiming hogs: -22
[    0.414774] rt2880-pinmux pinctrl: could not claim hogs: -22
[    0.420401] rt2880-pinmux: probe of pinctrl failed with error -22
[    0.432042] FPU Affinity set after 11720 emulations
[    0.432586] mt7621-pci 1e140000.pcie: could not find pctldev for node /pinctrl/pcie, deferring probe
[    0.450996] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    0.456844] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    0.462554] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    0.471173] clocksource: Switched to clocksource GIC
[    0.477885] NET: Registered protocol family 2
[    0.482844] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    0.489731] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
[    0.496223] TCP: Hash tables configured (established 2048 bind 2048)
[    0.502636] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    0.508394] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    0.514878] NET: Registered protocol family 1
[    0.519176] PCI: CLS 0 bytes, default 32
[    4.131110] 4 CPUs re-calibrate udelay(lpj = 2916352)
[    4.137722] Crashlog allocated RAM at address 0x3f00000
[    4.143143] workingset: timestamp_bits=14 max_order=16 bucket_order=2
[    4.158701] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    4.164478] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    4.176250] random: fast init done
[    4.181638] io scheduler noop registered
[    4.185473] io scheduler deadline registered (default)
[    4.191620] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[    4.199263] console [ttyS0] disabled
[    4.202858] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
[    4.211839] console [ttyS0] enabled
[    4.218694] bootconsole [early0] disabled
[    4.227307] cacheinfo: Unable to detect cache hierarchy for CPU 0
[    4.234185] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error
[    4.241408] Enable NFI Clock
[    4.244281] # MTK NAND # : Use HW ECC
[    4.247940] Device not found, ID: c2f1
[    4.251694] Not Support this Device! 

[    4.255422] chip_mode=00000001
[    4.258459] Support this Device in MTK table! c2f1 

[    4.263431] [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
[    4.269889] nand: device found, Manufacturer ID: 0xc2, Chip ID: 0xf1
[    4.276229] nand: Macronix NAND 128MiB 3,3V 8-bit
[    4.280911] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[    4.288484] Scanning device for bad blocks
[    4.534092] 11 fixed-partitions partitions found on MTD device MT7621-NAND
[    4.540934] Creating 11 MTD partitions on "MT7621-NAND":
[    4.546247] 0x000000000000-0x000000080000 : "boot"
[    4.552265] 0x000000080000-0x0000000c0000 : "u_env"
[    4.558235] 0x0000000c0000-0x000000100000 : "Factory"
[    4.564433] 0x000000100000-0x000000140000 : "s_env"
[    4.570380] 0x000000140000-0x000000180000 : "devinfo"
[    4.576561] 0x000000180000-0x000000580000 : "kernel"
[    4.582687] 0x000000580000-0x000002980000 : "rootfs"
[    4.588949] mtd: device 6 (rootfs) set to be root filesystem
[    4.595220] mtdsplit: no squashfs found in "rootfs"
[    4.600112] 0x000002980000-0x000002d80000 : "alt_kernel"
[    4.606575] 0x000002d80000-0x000005180000 : "alt_rootfs"
[    4.613272] 0x000005180000-0x000005280000 : "sysdiag"
[    4.619433] 0x000005280000-0x000007f80000 : "syscfg"
[    4.625896] [mtk_nand] probe successfully!
[    4.630677] Signature matched and data read!
[    4.634962] load_fact_bbt success 1023
[    4.639390] libphy: Fixed MDIO Bus: probed
[    4.712911] mtk_soc_eth 1e100000.ethernet: generated random MAC address b6:6c:ca:75:bd:40
[    4.721267] libphy: mdio: probed
[    6.136392] mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
[    6.143106] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
[    6.153968] NET: Registered protocol family 10
[    6.159978] Segment Routing with IPv6
[    6.163799] NET: Registered protocol family 17
[    6.168295] 8021q: 802.1Q VLAN Support v1.8
[    6.174348] mt7621-pci 1e140000.pcie: could not find pctldev for node /pinctrl/pcie, deferring probe
[    6.184105] hctosys: unable to open rtc device (rtc0)
[    6.204799] Freeing unused kernel memory: 4284K
[    6.209328] This architecture does not have kernel memory protection.
[    6.228475] init: Console is alive
[    6.232273] init: - watchdog -
[    6.248164] kmodloader: loading kernel modules from /etc/modules-boot.d/*
[    6.263585] usbcore: registered new interface driver usbfs
[    6.269175] usbcore: registered new interface driver hub
[    6.274664] usbcore: registered new device driver usb
[    6.283492] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    6.290937] ehci-platform: EHCI generic platform driver
[    6.301927] xhci-mtk 1e1c0000.xhci: 1e1c0000.xhci supply vbus not found, using dummy regulator
[    6.310598] xhci-mtk 1e1c0000.xhci: 1e1c0000.xhci supply vusb33 not found, using dummy regulator
[    6.319533] xhci-mtk 1e1c0000.xhci: xHCI Host Controller
[    6.324881] xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
[    6.341244] xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
[    6.350411] xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
[    6.357311] hub 1-0:1.0: USB hub found
[    6.361204] hub 1-0:1.0: 2 ports detected
[    6.365877] xhci-mtk 1e1c0000.xhci: xHCI Host Controller
[    6.371260] xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
[    6.378725] xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
[    6.385256] mt7621-pci 1e140000.pcie: could not find pctldev for node /pinctrl/pcie, deferring probe
[    6.394524] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[    6.403529] hub 2-0:1.0: USB hub found
[    6.407358] hub 2-0:1.0: 1 port detected
[    6.412242] mt7621-pci 1e140000.pcie: could not find pctldev for node /pinctrl/pcie, deferring probe
[    6.424361] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
[    6.451444] init: - preinit -
[    6.587681] mtk_soc_eth 1e100000.ethernet: PPE started
[    7.953712] mtk_soc_eth 1e100000.ethernet eth0: port 1 link up
[    8.167497] mtk_soc_eth 1e100000.ethernet eth0: port 0 link up
[    9.715592] mtk_soc_eth 1e100000.ethernet: 0x100 = 0x6060000c, 0x10c = 0x80818
[    9.730228] procd: - early -
[    9.733280] procd: - watchdog -
[   10.371303] procd: - watchdog -
[   10.374764] procd: - ubus -
[   10.382696] random: ubusd: uninitialized urandom read (4 bytes read)
[   10.431665] random: ubusd: uninitialized urandom read (4 bytes read)
[   10.438345] random: ubusd: uninitialized urandom read (4 bytes read)
[   10.445641] procd: - init -
[   10.684627] kmodloader: loading kernel modules from /etc/modules.d/*
[   10.695752] ip6_tables: (C) 2000-2006 Netfilter Core Team
[   10.700081] urngd: v1.0.0 started.
[   10.706619] Loading modules backported from Linux version v5.2-rc7-0-g6fbc7275c7a9
[   10.714200] Backport generated by backports.git v5.2-rc7-1-0-g021a6ba1
[   10.722551] ip_tables: (C) 2000-2006 Netfilter Core Team
[   10.734397] nf_conntrack version 0.5.0 (4096 buckets, 16384 max)
[   10.778626] xt_time: kernel timezone is -0000
[   10.831211] PPP generic driver version 2.4.2
[   10.836748] NET: Registered protocol family 24
[   10.843771] kmodloader: done loading kernel modules from /etc/modules.d/*
[   10.849718] random: crng init done
[   10.853951] random: 7 urandom warning(s) missed due to ratelimiting
[   25.453675] mtk_soc_eth 1e100000.ethernet: PPE started
[   25.463646] device eth0 entered promiscuous mode
[   25.469018] br-lan: port 1(eth0.2) entered blocking state
[   25.474544] br-lan: port 1(eth0.2) entered disabled state
[   25.480553] device eth0.2 entered promiscuous mode
[   25.488280] br-lan: port 1(eth0.2) entered blocking state
[   25.493771] br-lan: port 1(eth0.2) entered forwarding state
[   25.499906] IPv6: ADDRCONF(NETDEV_UP): br-lan: link is not ready
[   26.522117] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready
root@OpenWrt:/#

EDIT: Sorry i just realized that I made a terrible mistake, wifi works now, I will explain it more clearly later

farawayso · August 3, 2019, 2:12am

What is the bootloader that you flashed？

jackcolentern · August 3, 2019, 5:04am

Hi, what you mean by bootloader?

I flash it using tftp, now almost everything work but wifi is extremely weak, maybe the calibration data is not loaded correctly

farawayso · August 3, 2019, 5:29am

I mean that a boot like Breed or Pbboot replaces the official Uboot.
Sorry, my English is based on translation software. Maybe the meaning is not clear.
In this way, the official system can be restored if the brush is broken.
In addition, you can try to compile the package with 7615 driver by openwrd.

jackcolentern · August 3, 2019, 5:35am

It is ok I can understand you fine,
I just flash it in the original bootloader using tftp.
The NAND partition scheme contains two root partitions and it can use the other backup one, if the other one is bricked

are you from china? I can also use Chinese in private message if that is easier for you.

quarky · August 3, 2019, 6:33am

@jackcolentern I also have a Linksys EA7500-AH v2 which I'm running with master and the mt76 driver. WiFi signal, as you found out, is extremely weak. I can only connect to the router if I'm in the same room. If I'm out of even separated by a wall, connection becomes unreliable. I even forced power to 30dbm with hardcoded value to try if that can help, but it's just a little better.

I even tried the closed source driver that some folks have been trying out for the Xiaomi 3 Pro, but it couldn't even load as it kept crashing the EA7500.

It could be as you suspected, the calibration data is not correct.

I found that stock firmware has SKU files, which the mt76 open source driver does not use. The contents of the file suggest that power data can be configure for various configurations, e.g. 4T 3T 2T etc, which seems to imply transmission streams. I guess the open source drivers is not configuring the power of the amplifiers correctly?

Unfortunately I'm not knowledgable enough in WiFi or the mt76 drivers to start solving the problem.

It's great to know that I'm not the only only working on this router.

jackcolentern · August 3, 2019, 6:37am

Hi, I suspect the calibration data problem because the wifi MAC address I got from the Factory partition is not the same as the original firmware. Maybe because Linksys use a non standard calibration file format?

quarky · August 3, 2019, 6:45am

The router's mac address is actually stored in the devinfo partition. It's stored in ASCII, in key-value pairs, which unfortunately the mt76-mt7615 driver cannot use, as it expected binary mac address.

From what I understood of the EEPROM structure for the Factory partition, it has 6 bytes allocated for mac address, but when I looked at the partition, it contains Mediatek's mac addresses. In any case, I think the Linksys firmware changes the WiFi interfaces' mac-address (obtained from the devinfo partition and incremented accordingly) after the driver has loaded and during interface bring up.

I do not know much about WiFi interface calibration data to comment on whether Linksys is using non-standard ones, but I doubt it. Most likely they just take whatever Mediatek sends their way.

jackcolentern · August 3, 2019, 6:50am

I can only seems to find one set of MAC address in the devinfo partition, maybe we should calculate and set the MAC address during boot using a script (like commonly do on QCA devices).

one strange thing to me is that In the original firmware, LAN and WAN uses the same MAC address. Can you confirm that, because usually router uses two different mac address for LAN and WAN, thanks!

farawayso · August 3, 2019, 8:37am

我解开过其他mt7621路由器的eeprom，例如小米的R3G，用的是7612和7603无线（非双7615N）的eeprom，里面有三个mac地址，mtk的eeprom应该是一样的，里面解开的数据有三组mac，其他地方都是FFFFF，不是很好找而已！最后两位数不同，下面这张图是MAC地址丢失了！这个数据一定得保存好

farawayso · August 3, 2019, 8:44am

我以为你是拆机用TTL写入的，我的tftp工具不是很会用！这个路由器没开放ssh，有点麻烦！

jackcolentern · August 3, 2019, 8:48am

I think we better use English here, we can use Chinese in the private message though
I use ttl to initiate a tftp upgrade and write into flash
For now I cant seems to figure out how to flash it without ttl.

EDIT: unfortunately I cant find the mac original firmware used in the factory partition

jackcolentern · August 3, 2019, 10:32am

Upon further testing, although the range is quite OK, the speed is only 50~120Mbps on ac wifi, but I am not skilled enough to debug the wireless driver....

How is other MT7615 devices perform with mt7615e driver, do they have similar issues?

farawayso · August 4, 2019, 12:20am

https://www.right.com.cn/forum/forum.php?mod=viewthread&tid=250429&orderby=dateline

I modified the eeprom by this link.

quarky · August 4, 2019, 3:15am

My WiFi range is bad. Would you mind sharing the .dts file you created for your EA7500 v2? My is as shown below. I think my .dts file is probably wrong.

/dts-v1/;

#include "mt7621.dtsi"

/ {
	compatible = "linksys,ea7500ahv2", "mediatek,mt7621-soc";
	model = "Linksys EA7500-AH v2";

	chosen {
		bootargs = "console=ttyS0,115200";
	};
};

&nand {
	status = "okay";

	partitions {
	compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "boot";
			reg = <0x00000000 0x00080000>;
			read-only;
		};

		partition@00080000 {
			label = "u_env";
			reg = <0x00080000 0x00040000>;
			read-only;
		};

		factory: partition@000c0000 {
			label = "factory";
			reg = <0x000c0000 0x00040000>;
			read-only;
		};

		partition@00100000 {
			label = "s_env";
			reg = <0x00100000 0x00040000>;
			read-only;
		};

		devinfo: partition@00140000 {
			label = "devinfo";
			reg = <0x00140000 0x00040000>;
			read-only;
		};

		partition@00180000 {
			label = "kernel";
			reg = <0x00180000 0x02800000>;
		};

		partition@00580000 {
			label = "rootfs";
			reg = <0x00580000 0x02400000>;
		};

		partition@02980000 {
			label = "alt_kernel";
			reg = <0x02980000 0x02800000>;
			read-only;
		};

		partition@02d80000 {
			label = "alt_rootfs";
			reg = <0x02d80000 0x02400000>;
			read-only;
		};

		partition@05180000 {
			label = "sysdiag";
			reg = <0x05180000 0x00100000>;
			read-only;
		};

		partition@05280000 {
			label = "syscfg";
			reg = <0x05280000 0x02d00000>;
		};
	};
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi@0,0 {
		compatible = "pci14c3,7615";
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x0000>;
		mtd-mac-address = <&factory 0x4>;
		ieee80211-freq-limit = <2400000 2500000>;
	};
};

&pcie1 {
	wifi@0,0 {
		compatible = "pci14c3,7615";
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x8000>;
		mtd-mac-address = <&factory 0x8004>;
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&ethernet {
	mediatek,portmap = "wllll";
};

&sdhci {
	status = "okay";
};

&pinctrl {
	state_default: pinctrl0 {
		gpio {
			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
			ralink,function = "gpio";
		};
	};
};