@adron Here is the SPI-NOR dump:
https://drive.google.com/drive/folders/1WnswllcXaAgT8hKBx4Imzr_FRHWunpL4?usp=sharing
I have also traced most of the pins on the SPI+UART header.
1 GND Vcc RX ? GND
#--------------------#
|.-. .-. .-. .-. .-. |
|'-' '-' '-' '-' '-' |
|.-. .-. .-. .-. .-. |
|'-' '-' '-' '-' '-' |
#--------------------#
2 CLK DO /CS TX DI
Those pads marked RX and TX are meant for the unpopulated PoE MCU it seems as they end on its pads.
I can see:
BootROM - 2.03
Starting AP IOROM 1.02
Booting from SPI NOR flash 0
Found valid image at boot postion 0x000
lmv_ddr: mv_ddr-1.1.0-g8c6defd127 (Aug 03 2021 - 18:17:37)
mv_ddr: completed successfully
BL2: Initiating SCP_BL2 transfer to SCP
So UART needs to be enabled in the hard config as it's disabled in ATF and later.
I have changed:
15 00 04 00 05
to
15 00 04 00 00
But UART still stops working