Add support for Iomega Storcenter ix4-200d

For Developers
1

Hi, I have an Iomega Storcenter ix4-200d here, and just soldered the needed pins on CN4 and I was able to successfully get a bootlog using Serial-ttl cable.

I want to know if someone here have been able to boot Debian from an USB stick on this unit in order to give me a hand or hints in the process, or even better if knows how to flash OpenWRT on to the internal flash memory too. My initial plan is to boot Debian using an USB stick but will be useful if it something fails some day to have OpenWRT on the internal flash too.

Thanks.

2


forums.debian.net

https://openwrt.org/toh/hwdata/iomega/iomega_storcenter_ix2-200 -- though I do not see the ix4-200d, which may be an entirely different unit internally

Edit: From what I have read, the Kirkwood-based devices have proven themselves reasonably idiot-proof, with boot-loader recovery over serial apparently possible. The Seagate GoFlex devices may provide some additional hints if you decide to port OpenWrt to the ix4-200d.

2 Likes
3

Ok, I just found this, seems interesting: https://forum.archive.openwrt.org/viewtopic.php?id=63714

4

I'm trying to get this back into life, can someone help me to generate an image?... basically the part of generating the image using image builder adding proper drivers is what concerns me, because I didn't tried yet and also don't know how to know which and how to add them.

I may need help with others steps also.

5

@bobafetthotmail Hi! given your experience with other kirkwood devices, do you have by chance some hints to help me?

6

or you @jdwl1o1 any help will be appreciated!

7

Hi there, I think you're in luck - I used the ix2-200 info to create my ix2-dl images and install guide.

Install instructions are here; https://git.openwrt.org/?p=openwrt/openwrt.git;a=commit;h=27b2f0fc0fc5513304a5be3c5b8cb23aeb09e6f5

And images are available from here; https://openwrt.org/toh/hwdata/iomega/iomega_storcenter_ix2-200

It's likely the ix2 images are fine for an ix4, there's very little difference between kirkwood devices from the same manufacturer.

8

but, shouldn't I change the dtb in order to make it work properly?

9

You may need to tweak the dtb for the extra 2 sata ports, however I expect it will just work.

10

I actually just now achieved to make it boot from USB to plain Debian, so I'm one step ahead, but would love to have OpenWRT on the nand and make it bootable in case I remove the usb drive.

11

I can buy you a beer if you help me to build an image for this little thing! :grin:

will try then to load manually that image then.

12

Use the ix2-200 image - it's already mainlined for openwrt and will built for each release. Much easier to support.

13

Yeah, I know, but I would love to be capable to not just boot the box but also be able to fully access the four sata ports and the two ethernet ports. Also, is nice to hack these and learn new things. Thank you!

14

Well bad luck... didn't work.

Marvell>> tftpboot 0x00800000 openwrt-21.02.1-kirkwood-iom_ix2-200-squashfs-factory.bin
Using egiga0 device
TFTP from server 192.168.4.201; our IP address is 192.168.4.205
Filename 'openwrt-21.02.1-kirkwood-iom_ix2-200-squashfs-factory.bin'.
Load address: 0x800000
Loading: #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         ############################
done
Bytes transferred = 5799936 (588000 hex)

Marvell>> bootm 0x00800000
## Booting image at 00800000 ...
   Image Name:   ARM OpenWrt Linux-5.4.154
   Created:      2021-10-24   9:01:35 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2384170 Bytes =  2.3 MB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK
OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 5.4.154 (builder@buildhost) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r16325-88151b8303)) #0 Sun Oct 24 09:01:35 2021
[    0.000000] CPU: Feroceon 88FR131 [56251311] revision 1 (ARMv5TE), cr=0005397f
[    0.000000] CPU: VIVT data cache, VIVT instruction cache
[    0.000000] OF: fdt: Machine model: Iomega StorCenter ix2-200
[    0.000000] Memory policy: Data cache writeback
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 129920
[    0.000000] Kernel command line: console=ttyS0,115200n8 earlyprintk
[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 511616K/524288K available (5159K kernel code, 179K rwdata, 828K rodata, 1024K init, 211K bss, 12672K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] random: get_random_bytes called from 0xc0700b9c with crng_init=0
[    0.000000] clocksource: orion_clocksource: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 9556302233 ns
[    0.000007] sched_clock: 32 bits at 200MHz, resolution 5ns, wraps every 10737418237ns
[    0.000034] Switching to timer-based delay loop, resolution 5ns
[    0.000105] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=2000000)
[    0.000122] pid_max: default: 32768 minimum: 301
[    0.000327] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.000346] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.001160] CPU: Testing write buffer coherency: ok
[    0.001916] Setting up static identity map for 0x100000 - 0x10003c
[    0.002153] mvebu-soc-id: MVEBU SoC ID=0x6281, Rev=0x3
[    0.005619] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.005642] futex hash table entries: 256 (order: -1, 3072 bytes, linear)
[    0.005760] pinctrl core: initialized pinctrl subsystem
[    0.006858] NET: Registered protocol family 16
[    0.007207] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.008092] cpuidle: using governor ladder
[    0.008412] Feroceon L2: Enabling L2
[    0.008452] Feroceon L2: Cache support initialised.
[    0.012223] No ATAGs?
[    0.029837] SCSI subsystem initialized
[    0.030773] usbcore: registered new interface driver usbfs
[    0.030824] usbcore: registered new interface driver hub
[    0.030869] usbcore: registered new device driver usb
[    0.031017] workqueue: max_active 576 requested for napi_workq is out of range, clamping between 1 and 512
[    0.033617] clocksource: Switched to clocksource orion_clocksource
[    0.034258] thermal_sys: Registered thermal governor 'step_wise'
[    0.034475] NET: Registered protocol family 2
[    0.034624] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
[    0.035343] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    0.035373] TCP established hash table entries: 4096 (order: 2, 16384 bytes, linear)
[    0.035424] TCP bind hash table entries: 4096 (order: 2, 16384 bytes, linear)
[    0.035473] TCP: Hash tables configured (established 4096 bind 4096)
[    0.035546] UDP hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.035568] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.035730] NET: Registered protocol family 1
[    0.035757] PCI: CLS 0 bytes, default 32
[    0.037986] workingset: timestamp_bits=14 max_order=17 bucket_order=3
[    0.043293] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.043303] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.049024] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
[    0.052334] kirkwood-pinctrl f1010000.pin-controller: registered pinctrl driver
[    0.053200] mvebu-gpio f1010140.gpio: IRQ index 3 not found
[    0.053720] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled
[    0.055357] printk: console [ttyS0] disabled
[    0.055426] f1012000.serial: ttyS0 at MMIO 0xf1012000 (irq = 26, base_baud = 12500000) is a 16550A
[    0.453538] printk: console [ttyS0] enabled
[    0.458272] Loading iSCSI transport class v2.0-870.
[    0.464982] nand: device found, Manufacturer ID: 0xec, Chip ID: 0x75
[    0.471368] nand: Samsung NAND 32MiB 3,3V 8-bit
[    0.475942] nand: 32 MiB, SLC, erase size: 16 KiB, page size: 512, OOB size: 16
[    0.483290] Scanning device for bad blocks
[    0.701331] 4 fixed-partitions partitions found on MTD device orion_nand
[    0.708069] Creating 4 MTD partitions on "orion_nand":
[    0.713231] 0x000000000000-0x000000100000 : "u-boot"
[    0.718877] 0x0000000a0000-0x0000000c0000 : "u-boot environment"
[    0.725500] 0x000000100000-0x000000400000 : "kernel"
[    0.731108] 0x000000400000-0x000002000000 : "ubi"
[    0.737464] libphy: Fixed MDIO Bus: probed
[    0.742235] libphy: orion_mdio_bus: probed
[    0.750515] mdio_bus f1072004.mdio-bus-mii: MDIO device at address 11 is missing.
[    0.758370] mv643xx_eth: MV-643xx 10/100/1000 ethernet driver version 1.4
[    0.766092] rtc-mv f1010300.rtc: registered as rtc0
[    0.771045] i2c /dev entries driver
[    0.775460] watchdog: f1020300.watchdog-timer: driver supplied timeout (4294967295) out of range
[    0.784312] watchdog: f1020300.watchdog-timer: falling back to default timeout (21)
[    0.792138] orion_wdt: Initial timeout 21 sec
[    0.801902] marvell-cesa f1030000.crypto: CESA device successfully registered
[    0.810020] NET: Registered protocol family 10
[    0.816092] Segment Routing with IPv6
[    0.819840] NET: Registered protocol family 17
[    0.824373] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
[    0.837520] 8021q: 802.1Q VLAN Support v1.8
[    0.844390] UBI error: no valid UBI magic found inside mtd3
[    0.850030] rtc-mv f1010300.rtc: setting system clock to 2021-11-25T10:59:14 UTC (1637837954)
[    0.859291] /dev/root: Can't open blockdev
[    0.863408] VFS: Cannot open root device "(null)" or unknown-block(0,0): error -6
[    0.870942] Please append a correct "root=" boot option; here are the available partitions:
[    0.879346] 1f00            1024 mtdblock0 
[    0.879348]  (driver?)
[    0.885927] 1f01             128 mtdblock1 
[    0.885929]  (driver?)
[    0.892495] 1f02            3072 mtdblock2 
[    0.892497]  (driver?)
[    0.899070] 1f03           28672 mtdblock3 
[    0.899072]  (driver?)

[    0.905647] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[    0.913947] Rebooting in 1 seconds..
15

Image builder only creates images for devices that already exist.

On embedded devices, the hardware definitions are hard-coded in a file called "dtb" (device tree). If you can't get it to boot with the dtb of ix2-200 you need to go here https://forum.doozan.com/read.php?2,12096 and download his source code file linux-x.xx.x-kirkwood-tld-x-bodhi.tar.bz2 where in the patch file you find a dtb for your device (among others that he supports).

Then you can probably just look at what was done in commit that added the ix2-200 to create a new commit for yoru device and add the dtb file from bodhi's debian project instead.

Or at least use his known-working dtb as a base for the edits you will do to the one from upstream (if there is one upstream), anyway.

That's more or less how I did add kirkwood devices, I mostly just integrated bodhi's work on Debian to OpenWrt.

16

Thank you both, I will try to do that, I'll keep you posted on my findings.

17 
$ fdtdump kirkwood-iomega_ix4_200d.dtb

**** fdtdump is a low-level debugging tool, not meant for general use.
**** If you want to decompile a dtb, you probably want
****     dtc -I dtb -O dts <filename>

/dts-v1/;
// magic:		0xd00dfeed
// totalsize:		0x243a (9274)
// off_dt_struct:	0x38
// off_dt_strings:	0x210c
// off_mem_rsvmap:	0x28
// version:		17
// last_comp_version:	16
// boot_cpuid_phys:	0x0
// size_dt_strings:	0x32e
// size_dt_struct:	0x20d4

/ {
    #address-cells = <0x00000001>;
    #size-cells = <0x00000001>;
    compatible = "marvell,rd88f6281-a", "marvell,rd88f6281", "marvell,kirkwood-88f6281", "marvell,kirkwood";
    interrupt-parent = <0x00000001>;
    model = "Iomega ix4-200d";
    cpus {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        cpu@0 {
            device_type = "cpu";
            compatible = "marvell,feroceon";
            reg = <0x00000000>;
            clocks = <0x00000002 0x00000001 0x00000002 0x00000003 0x00000003 0x0000000b>;
            clock-names = "cpu_clk", "ddrclk", "powersave";
        };
    };
    aliases {
        gpio0 = "/ocp@f1000000/gpio@10100";
        gpio1 = "/ocp@f1000000/gpio@10140";
        i2c0 = "/ocp@f1000000/i2c@11000";
    };
    mbus@f1000000 {
        compatible = "marvell,kirkwood-mbus", "simple-bus";
        #address-cells = <0x00000002>;
        #size-cells = <0x00000001>;
        ranges = <0xf0010000 0x00000000 0xf1000000 0x00100000 0x012f0000 0x00000000 0xf4000000 0x00010000 0x03010000 0x00000000 0xf5000000 0x00010000>;
        controller = <0x00000004>;
        pcie-mem-aperture = <0xe0000000 0x10000000>;
        pcie-io-aperture = <0xf2000000 0x00100000>;
        nand@12f {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000001>;
            cle = <0x00000000>;
            ale = <0x00000001>;
            bank-width = <0x00000001>;
            compatible = "marvell,orion-nand";
            reg = <0x012f0000 0x00000000 0x00000400>;
            chip-delay = <0x00000028>;
            clocks = <0x00000003 0x00000007>;
            pinctrl-0 = <0x00000005>;
            pinctrl-names = "default";
            status = "okay";
            partition@0 {
                label = "u-boot";
                reg = <0x00000000 0x00100000>;
                read-only;
            };
            partition@100000 {
                label = "uImage";
                reg = <0x00100000 0x00500000>;
            };
            partition@0500000 {
                label = "rootfs";
                reg = <0x00500000 0x02000000>;
            };
        };
        sa-sram@301 {
            compatible = "mmio-sram";
            reg = <0x03010000 0x00000000 0x00000800>;
            clocks = <0x00000003 0x00000011>;
            #address-cells = <0x00000001>;
            #size-cells = <0x00000001>;
            phandle = <0x0000000b>;
        };
        pcie@82000000 {
            compatible = "marvell,kirkwood-pcie";
            status = "okay";
            device_type = "pci";
            #address-cells = <0x00000003>;
            #size-cells = <0x00000002>;
            bus-range = <0x00000000 0x000000ff>;
            ranges = <0x82000000 0x00000000 0x00040000 0xf0010000 0x00040000 0x00000000 0x00002000 0x82000000 0x00000001 0x00000000 0x04e80000 0x00000000 0x00000001 0x00000000 0x81000000 0x00000001 0x00000000 0x04e00000 0x00000000 0x00000001 0x00000000>;
            pcie@1,0 {
                device_type = "pci";
                assigned-addresses = <0x82000800 0x00000000 0x00040000 0x00000000 0x00002000>;
                reg = <0x00000800 0x00000000 0x00000000 0x00000000 0x00000000>;
                #address-cells = <0x00000003>;
                #size-cells = <0x00000002>;
                #interrupt-cells = <0x00000001>;
                ranges = <0x82000000 0x00000000 0x00000000 0x82000000 0x00000001 0x00000000 0x00000001 0x00000000 0x81000000 0x00000000 0x00000000 0x81000000 0x00000001 0x00000000 0x00000001 0x00000000>;
                bus-range = <0x00000000 0x000000ff>;
                interrupt-map-mask = <0x00000000 0x00000000 0x00000000 0x00000000>;
                interrupt-map = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000001 0x00000009>;
                marvell,pcie-port = <0x00000000>;
                marvell,pcie-lane = <0x00000000>;
                clocks = <0x00000003 0x00000002>;
                status = "okay";
            };
        };
    };
    ocp@f1000000 {
        compatible = "simple-bus";
        ranges = <0x00000000 0xf1000000 0x00100000>;
        #address-cells = <0x00000001>;
        #size-cells = <0x00000001>;
        pin-controller@10000 {
            reg = <0x00010000 0x00000020>;
            compatible = "marvell,88f6281-pinctrl";
            pmx-ge1 {
                marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23", "mpp24", "mpp25", "mpp26", "mpp27", "mpp30", "mpp31", "mpp32", "mpp33";
                marvell,function = "ge1";
                phandle = <0x0000000d>;
            };
            pmx-nand {
                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp18", "mpp19";
                marvell,function = "nand";
                phandle = <0x00000005>;
            };
            pmx-spi {
                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
                marvell,function = "spi";
                phandle = <0x00000006>;
            };
            pmx-twsi0 {
                marvell,pins = "mpp8", "mpp9";
                marvell,function = "twsi0";
                phandle = <0x00000007>;
            };
            pmx-uart0 {
                marvell,pins = "mpp10", "mpp11";
                marvell,function = "uart0";
                phandle = <0x00000008>;
            };
            pmx-uart1 {
                marvell,pins = "mpp13", "mpp14";
                marvell,function = "uart1";
                phandle = <0x00000009>;
            };
            pmx-sata0 {
                marvell,pins = "mpp5", "mpp21", "mpp23";
                marvell,function = "sata0";
            };
            pmx-sata1 {
                marvell,pins = "mpp4", "mpp20", "mpp22";
                marvell,function = "sata1";
            };
            pmx-sdio {
                marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16", "mpp17";
                marvell,function = "sdio";
                phandle = <0x00000011>;
            };
        };
        core-clocks@10030 {
            compatible = "marvell,kirkwood-core-clock";
            reg = <0x00010030 0x00000004>;
            #clock-cells = <0x00000001>;
            phandle = <0x00000002>;
        };
        spi@10600 {
            compatible = "marvell,orion-spi";
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            cell-index = <0x00000000>;
            interrupts = <0x00000017>;
            reg = <0x00010600 0x00000028>;
            clocks = <0x00000003 0x00000007>;
            pinctrl-0 = <0x00000006>;
            pinctrl-names = "default";
            status = "disabled";
        };
        gpio@10100 {
            compatible = "marvell,orion-gpio";
            #gpio-cells = <0x00000002>;
            gpio-controller;
            reg = <0x00010100 0x00000040>;
            ngpios = <0x00000020>;
            interrupt-controller;
            #interrupt-cells = <0x00000002>;
            interrupts = <0x00000023 0x00000024 0x00000025 0x00000026>;
            clocks = <0x00000003 0x00000007>;
        };
        gpio@10140 {
            compatible = "marvell,orion-gpio";
            #gpio-cells = <0x00000002>;
            gpio-controller;
            reg = <0x00010140 0x00000040>;
            ngpios = <0x00000012>;
            interrupt-controller;
            #interrupt-cells = <0x00000002>;
            interrupts = <0x00000027 0x00000028 0x00000029>;
            clocks = <0x00000003 0x00000007>;
        };
        i2c@11000 {
            compatible = "marvell,mv64xxx-i2c";
            reg = <0x00011000 0x00000020>;
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            interrupts = <0x0000001d>;
            clock-frequency = <0x000186a0>;
            clocks = <0x00000003 0x00000007>;
            pinctrl-0 = <0x00000007>;
            pinctrl-names = "default";
            status = "okay";
            adt7473@2e {
                compatible = "adi,adt7473";
                reg = <0x0000002e>;
            };
        };
        serial@12000 {
            compatible = "ns16550a";
            reg = <0x00012000 0x00000100>;
            reg-shift = <0x00000002>;
            interrupts = <0x00000021>;
            clocks = <0x00000003 0x00000007>;
            pinctrl-0 = <0x00000008>;
            pinctrl-names = "default";
            status = "ok";
        };
        serial@12100 {
            compatible = "ns16550a";
            reg = <0x00012100 0x00000100>;
            reg-shift = <0x00000002>;
            interrupts = <0x00000022>;
            clocks = <0x00000003 0x00000007>;
            pinctrl-0 = <0x00000009>;
            pinctrl-names = "default";
            status = "disabled";
        };
        mbus-controller@20000 {
            compatible = "marvell,mbus-controller";
            reg = <0x00020000 0x00000080 0x00001500 0x00000020>;
            phandle = <0x00000004>;
        };
        system-controller@20000 {
            compatible = "marvell,orion-system-controller";
            reg = <0x00020000 0x00000120>;
        };
        bridge-interrupt-ctrl@20110 {
            compatible = "marvell,orion-bridge-intc";
            interrupt-controller;
            #interrupt-cells = <0x00000001>;
            reg = <0x00020110 0x00000008>;
            interrupts = <0x00000001>;
            marvell,#interrupts = <0x00000006>;
            phandle = <0x0000000a>;
        };
        clock-gating-control@2011c {
            compatible = "marvell,kirkwood-gating-clock";
            reg = <0x0002011c 0x00000004>;
            clocks = <0x00000002 0x00000000>;
            #clock-cells = <0x00000001>;
            phandle = <0x00000003>;
        };
        l2-cache@20128 {
            compatible = "marvell,kirkwood-cache";
            reg = <0x00020128 0x00000004>;
        };
        interrupt-controller@20200 {
            compatible = "marvell,orion-intc";
            interrupt-controller;
            #interrupt-cells = <0x00000001>;
            reg = <0x00020200 0x00000010 0x00020210 0x00000010>;
            phandle = <0x00000001>;
        };
        timer@20300 {
            compatible = "marvell,orion-timer";
            reg = <0x00020300 0x00000020>;
            interrupt-parent = <0x0000000a>;
            interrupts = <0x00000001 0x00000002>;
            clocks = <0x00000002 0x00000000>;
        };
        watchdog-timer@20300 {
            compatible = "marvell,orion-wdt";
            reg = <0x00020300 0x00000028 0x00020108 0x00000004>;
            interrupt-parent = <0x0000000a>;
            interrupts = <0x00000003>;
            clocks = <0x00000003 0x00000007>;
            status = "okay";
        };
        crypto@30000 {
            compatible = "marvell,kirkwood-crypto";
            reg = <0x00030000 0x00010000>;
            reg-names = "regs";
            interrupts = <0x00000016>;
            clocks = <0x00000003 0x00000011>;
            marvell,crypto-srams = <0x0000000b>;
            marvell,crypto-sram-size = <0x00000800>;
            status = "okay";
        };
        ehci@50000 {
            compatible = "marvell,orion-ehci";
            reg = <0x00050000 0x00001000>;
            interrupts = <0x00000013>;
            clocks = <0x00000003 0x00000003>;
            status = "okay";
        };
        xor@60800 {
            compatible = "marvell,orion-xor";
            reg = <0x00060800 0x00000100 0x00060a00 0x00000100>;
            status = "okay";
            clocks = <0x00000003 0x00000008>;
            xor00 {
                interrupts = <0x00000005>;
                dmacap,memcpy;
                dmacap,xor;
            };
            xor01 {
                interrupts = <0x00000006>;
                dmacap,memcpy;
                dmacap,xor;
                dmacap,memset;
            };
        };
        xor@60900 {
            compatible = "marvell,orion-xor";
            reg = <0x00060900 0x00000100 0x00060b00 0x00000100>;
            status = "okay";
            clocks = <0x00000003 0x00000010>;
            xor00 {
                interrupts = <0x00000007>;
                dmacap,memcpy;
                dmacap,xor;
            };
            xor01 {
                interrupts = <0x00000008>;
                dmacap,memcpy;
                dmacap,xor;
                dmacap,memset;
            };
        };
        ethernet-controller@72000 {
            compatible = "marvell,kirkwood-eth";
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00072000 0x00004000>;
            clocks = <0x00000003 0x00000000>;
            marvell,tx-checksum-limit = <0x00000640>;
            status = "okay";
            ethernet0-port@0 {
                compatible = "marvell,kirkwood-eth-port";
                reg = <0x00000000>;
                interrupts = <0x0000000b>;
                local-mac-address = [00 00 00 00 00 00];
                phy-handle = <0x0000000c>;
            };
        };
        mdio-bus@72004 {
            compatible = "marvell,orion-mdio";
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00072004 0x00000084>;
            interrupts = <0x0000002e>;
            clocks = <0x00000003 0x00000000>;
            status = "okay";
            ethernet-phy@8 {
                device_type = "ethernet-phy";
                reg = <0x00000008>;
                phandle = <0x0000000c>;
            };
            ethernet-phy@9 {
                device_type = "ethernet-phy";
                reg = <0x00000009>;
                phandle = <0x0000000e>;
            };
        };
        ethernet-controller@76000 {
            compatible = "marvell,kirkwood-eth";
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00076000 0x00004000>;
            clocks = <0x00000003 0x00000013>;
            marvell,tx-checksum-limit = <0x00000640>;
            pinctrl-0 = <0x0000000d>;
            pinctrl-names = "default";
            status = "okay";
            ethernet1-port@0 {
                compatible = "marvell,kirkwood-eth-port";
                reg = <0x00000000>;
                interrupts = <0x0000000f>;
                local-mac-address = [00 00 00 00 00 00];
                phy-handle = <0x0000000e>;
            };
        };
        sata-phy@82000 {
            compatible = "marvell,mvebu-sata-phy";
            reg = <0x00082000 0x00000334>;
            clocks = <0x00000003 0x0000000e>;
            clock-names = "sata";
            #phy-cells = <0x00000000>;
            status = "okay";
            phandle = <0x0000000f>;
        };
        sata-phy@84000 {
            compatible = "marvell,mvebu-sata-phy";
            reg = <0x00084000 0x00000334>;
            clocks = <0x00000003 0x0000000f>;
            clock-names = "sata";
            #phy-cells = <0x00000000>;
            status = "okay";
            phandle = <0x00000010>;
        };
        audio-controller@a0000 {
            compatible = "marvell,kirkwood-audio";
            #sound-dai-cells = <0x00000000>;
            reg = <0x000a0000 0x00002210>;
            interrupts = <0x00000018>;
            clocks = <0x00000003 0x00000009>;
            clock-names = "internal";
            status = "disabled";
        };
        rtc@10300 {
            compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
            reg = <0x00010300 0x00000020>;
            interrupts = <0x00000035>;
            clocks = <0x00000003 0x00000007>;
        };
        sata@80000 {
            compatible = "marvell,orion-sata";
            reg = <0x00080000 0x00005000>;
            interrupts = <0x00000015>;
            clocks = <0x00000003 0x0000000e 0x00000003 0x0000000f>;
            clock-names = "0", "1";
            phys = <0x0000000f 0x00000010>;
            phy-names = "port0", "port1";
            status = "okay";
            nr-ports = <0x00000002>;
        };
        mvsdio@90000 {
            compatible = "marvell,orion-sdio";
            reg = <0x00090000 0x00000200>;
            interrupts = <0x0000001c>;
            clocks = <0x00000003 0x00000004>;
            pinctrl-0 = <0x00000011>;
            pinctrl-names = "default";
            bus-width = <0x00000004>;
            cap-sdio-irq;
            cap-sd-highspeed;
            cap-mmc-highspeed;
            status = "disabled";
        };
    };
    memory {
        device_type = "memory";
        reg = <0x00000000 0x20000000>;
    };
    chosen {
        bootargs = "console=ttyS0,115200n8 earlyprintk";
        stdout-path = "/ocp@f1000000/serial@12000";
    };
};
18

Well, cloned the repo, and trying to find that commit but doesn't appears anywhere, I just found a patch in patches-5.4 but I don't realize how can I create those .patch , I mean, I know how to create a .patch file using git diff but I don't know with which data and against which files... I never done this in the past, neither in openwrt or patching a kernet, etc.

please! help, I will appreciate any hints on this!

Edit: well, I found it here: https://github.com/openwrt/openwrt/commit/27b2f0fc0fc5513304a5be3c5b8cb23aeb09e6f5

but still no idea on how to create those patchs

19

yeah OpenWrt buildsytem offers quilt integration to create those patches without doing everything manually (which would be insane).

see this documentation https://openwrt.org/docs/guide-developer/toolchain/use-patches-with-buildsystem
and the patch to the dtb is for Linux kernel, so follow the instructions for that.

Also that commit can be seen with the (better) github web interface too where you can see more easily all files that were changed.

You can do your changes and not commit them for now, the important part is that you manage to create a .patch file with your changes and put it in the same folder where you find others. The temporary files where the kernel source is extracted is deleted every time you rebuild from source, and the patches from that folder are re-applied.

21

please if you can provide me more info on further steps, or some links, after I create the files should just call "make" to compile everything or there is a way to just compile the kernel and build the image with the recompiled kernel or its better just wait for everything be compiled, ?