BootLog.StockFW.Part.2
<-- RTMPAllocTxRxRingMemory, Status=0, ErrorValue=0x
<-- RTMPAllocAdapterBlock, Status=0
pAd->CSRBaseAddress =0xc2d80000, csr_addr=0xc2d80000!
device_id =0x7603
RtmpChipOpsHook(507): Not support for HIF_MT yet!
mt7603_init()-->
mt_bcn_buf_init(224): Not support for HIF_MT yet!
<--mt7603_init()
ap_name=wlan, action=start
interface ra1 does not exist!
ifconfig: ioctl 0x8913 failed: No such device
device ra0 is not a slave of br0
device rai0 is not a slave of br0
get_wdev_by_idx: invalid idx(0)
get_wdev_by_idx: invalid idx(0)
get_wdev_by_idx: invalid idx(0)
get_wdev_by_idx: invalid idx(0)
get_wdev_by_idx: invalid idx(0)
get_wdev_by_idx: invalid idx(0)
get_wdev_by_idx: invalid idx(0)
DriverOwn()::Return since already in Driver Own...
===============================
Current DevInfo Num: 0
===============================
===============================
Current BssInfo Num: 0
===============================
===============================
Current StaRec Num: 0
===============================
APWdsInitialize():WdsEntry[0]
APWdsInitialize():WdsEntry[1]
APWdsInitialize():WdsEntry[2]
APWdsInitialize():WdsEntry[3]
[wifi_fwd_set_cb_num] band_cb_offset=33, recv_from_cb_offset=34
RtmpOSFileOpen(): Error 2 opening /etc/Wireless/iNIC/iNIC_ap_5G.dat
Open file "/etc/Wireless/iNIC/iNIC_ap_5G.dat" failed!
E2pAccessMode=2
SSID[0]=Beeline_5G_F13791, EdcaIdx=0
RTMPSetProfileParameters(): DBDC Mode=0
cfg_mode=14
cfg_mode=14
wmode_band_equal(): Band Equal!
[TxPower] BAND0: 100
[PERCENTAGEenable] BAND0: 1
APEdca0
APEdca1
APEdca2
APEdca3
APSDCapable[0]=0
APSDCapable[1]=0
APSDCapable[2]=0
APSDCapable[3]=0
APSDCapable[4]=0
APSDCapable[5]=0
APSDCapable[6]=0
APSDCapable[7]=0
APSDCapable[8]=0
APSDCapable[9]=0
APSDCapable[10]=0
APSDCapable[11]=0
APSDCapable[12]=0
APSDCapable[13]=0
APSDCapable[14]=0
APSDCapable[15]=0
default ApCliAPSDCapable[0]=0
default ApCliAPSDCapable[1]=0
rtmp_read_wds_from_file(): WDS Profile
APWdsInitialize():WdsEntry[0]
APWdsInitialize():WdsEntry[1]
APWdsInitialize():WdsEntry[2]
APWdsInitialize():WdsEntry[3]
WDS-Enable mode=0
HT: Ext Channel = BELOW
HT: greenap_cap = 0
WtcSetMaxStaNum: MaxStaNum:87, BssidNum:1, WdsNum:4, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
Top Init Done!
Use alloc_skb
RX[0] DESC a0c14000 size = 8192
RX[1] DESC a0c16000 size = 8192
Hif Init Done!
ctl->txq = c04f9400
ctl->rxq = c04f940c
ctl->ackq = c04f9418
ctl->kickq = c04f9424
ctl->tx_doneq = c04f9430
ctl->rx_doneq = c04f943c
mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
mt7615_fw_prepare(2752): MT7615_E3, USE E3 patch and ram code binary image
AndesMTLoadRomMethodFwDlRing(1036), cap->rom_patch_len(11150)
AndesRestartCheck: Current TOP_MISC2(0x1)
AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
20170304031443a
platform =
ALPS
hw/sw version =
8a108a10
patch version =
00000010
Patch SEM Status=2
MtCmdPatchSemGet:(ret = 0)
Patch is not ready && get semaphore success, SemStatus(2)
EventGenericEventHandler: CMD Success
MtCmdAddressLenReq:(ret = 0)
MtCmdPatchFinishReq
EventGenericEventHandler: CMD Success
Send checksum req..
Patch SEM Status=3
MtCmdPatchSemGet:(ret = 0)
Release patch semaphore, SemStatus(3)
AndesMTEraseRomPatch
WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
AndesMTLoadFwMethodFwDlRing(810), cap->fw_len(459960)
Build Date:_201705121437
Build Date:_201705121437
AndesRestartCheck: Current TOP_MISC2(0x1)
AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
EventGenericEventHandler: CMD Success
MtCmdAddressLenReq:(ret = 0)
EventGenericEventHandler: CMD Success
MtCmdAddressLenReq:(ret = 0)
MtCmdFwStartReq: override = 1, address = 540672
EventGenericEventHandler: CMD Success
Build Date:_201703141726
EventGenericEventHandler: CMD Success
MtCmdAddressLenReq:(ret = 0)
MtCmdFwStartReq: override = 4, address = 0
EventGenericEventHandler: CMD Success
WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
MCU Init Done!
efuse_probe: efuse = 10000212
RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
RtmpEepromGetDefault::e2p_dafault=1
RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x8000]
NICReadEEPROMParameters():Calling eeinit
NICReadEEPROMParameters: EEPROM 0x52 b302
NICReadEEPROMParameters: EEPROM 0x52 b302
Country Region from e2p = 101
mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
rtmp_read_txpwr_from_eeprom(243): Don't Support this now!
RTMPReadTxPwrPerRate(1382): Don't Support this now!
RcRadioInit(): DbdcMode=0, ConcurrentBand=1
RcRadioInit(): pRadioCtrl=87646464,Band=0,rfcap=3,channel=1,PhyMode=2
MtCmdSetDbdcCtrl:(ret = 0)
Band Rf: 1, Phy Mode: 2
AntCfgInit(2787): Not support for HIF_MT yet!
MtSingleSkuLoadParam: RF_LOCKDOWN Feature ON !!!
MtSingleSkuLoadParam: SKU Table index = 0
MtBfBackOffLoadTable: RF_LOCKDOWN Feature ON !!!
MtBfBackOffLoadTable: BFBackoff Table index = 0
EEPROM Init Done!
mt_mac_init()-->
mt_mac_pse_init(2787): Don't Support this now!
mt7615_init_mac_cr()-->
mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
MtAsicSetMacMaxLen(1313): Not finish Yet!
<--mt_mac_init()
CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
MAC Init Done!
MT7615BBPInit():BBP Initialization.....
Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
MT7615BBPInit() todo
PHY Init Done!
tx_pwr_comp_init():NotSupportYet!
MtCmdSetMacTxRx:(ret = 0)
CountryCode(2.4G/5G)=1/13, RFIC=25, PHY mode(2.4G/5G)=49/49, support 25 channels
WifiSysOpen(), wdev idx = 0
wdev_attr_update(): wdevId0 = 74:9d:79:xx:xx:2d
MtCmdSetDbdcCtrl:(ret = 0)
ApAutoChannelAtBootUp----------------->
ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
MtCmdSetMacTxRx:(ret = 0)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210] offset [1900]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210] offset [1900]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210] offset [1900]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210] offset [1900]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
:MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290] offset [1a00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290] offset [1a00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290] offset [1a00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [58] BW [2] from cetral freq [5290] offset [1a00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 58 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530] offset [1d00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530] offset [1d00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530] offset [1d00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [106] BW [2] from cetral freq [5530] offset [1d00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 106 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610] offset [1e00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610] offset [1e00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610] offset [1e00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [122] BW [2] from cetral freq [5610] offset [1e00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 122 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [138] BW [2] from cetral freq [5690] offset [1f00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 132,control_ch2=0, central_chl = 138 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [138] BW [2] from cetral freq [5690] offset [1f00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 136,control_ch2=0, central_chl = 138 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [138] BW [2] from cetral freq [5690] offset [1f00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 140,control_ch2=0, central_chl = 138 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [138] BW [2] from cetral freq [5690] offset [1f00]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 144,control_ch2=0, central_chl = 138 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [155] BW [2] from cetral freq [5775] offset [2000]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 149,control_ch2=0, central_chl = 155 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [155] BW [2] from cetral freq [5775] offset [2000]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 153,control_ch2=0, central_chl = 155 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [155] BW [2] from cetral freq [5775] offset [2000]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 157,control_ch2=0, central_chl = 155 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
[DfsSwitchCheck]: DFS ByPass TX calibration.
mt7615_apply_dcoc() : reload Central CH [155] BW [2] from cetral freq [5775] offset [2000]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 161,control_ch2=0, central_chl = 155 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(1)
====================================================================
Channel 36 : Busy Time = 247, Skip Channel = FALSE, BwCap = TRUE
Channel 40 : Busy Time = 10571, Skip Channel = FALSE, BwCap = TRUE
Channel 44 : Busy Time = 230, Skip Channel = FALSE, BwCap = TRUE
Channel 48 : Busy Time = 214, Skip Channel = FALSE, BwCap = TRUE
====================================================================
Rule 3 Channel Busy time value : Select Primary Channel 48
Rule 3 Channel Busy time value : Min Channel Busy = 10571
Rule 3 Channel Busy time value : BW = 80
AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 49,Channel = 48
ApAutoChannelAtBootUp<-----------------
Current Channel is 48. DfsZeroWaitSupport=0
MtAsicSetChBusyStat(865): Not support for HIF_MT yet!
[PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
[PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=48
CountryCode(2.4G/5G)=1/13, RFIC=25, PHY mode(2.4G/5G)=49/49, support 25 channels
Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
LinkToOmacIdx = 0, LinkToWdevType = 1
bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO), CmdBssInfoBmcRate.u2BcTransmit= 8192, CmdBssInfoBmcRate.u2McTransmit = 8196
[RadarStateCheck]Set into RD_NORMAL_MODE
MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
mt7615_bbp_adjust():rf_bw=2, ext_ch=3, PrimCh=48, HT-CentCh=46, VHT-CentCh=42
mt7615_apply_dcoc() : reload Central CH [42] BW [2] from cetral freq [5210] offset [1900]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_cal_data() : eeprom 0x52 bit 0 is 0, do runtime cal , skip TX reload
MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 42 DBDCIdx= 0, Band= 0
BW = 2,TXStream = 4, RXStream = 4, scan(0)
ap_phy_rrm_init_byRf(): AP Set CentralFreq at 42(Prim=48, HT-CentCh=46, VHT-CentCh=42, BBP_BW=2)
[WrapDfsRadarDetectStart]: Band0Ch is 48[WrapDfsRadarDetectStart]: Band1Ch is 0LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
MtAsicSetRalinkBurstMode(2618): Not support for HIF_MT yet!
MtAsicSetPiggyBack(802): Not support for HIF_MT yet!
MtAsicSetTxPreamble(2597): Not support for HIF_MT yet!
WifiFwdSet::disabled=0
Main bssid = 74:9d:79:xx:xx:2d
AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
MtCmdSetMacTxRx:(ret = 0)
fdb_enable()
MCS Set = ff ff ff ff 01
<==== mt_wifi_init, Status=0
MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
WDS_Init():
The new WDS interface MAC = FF:FF:FF:FF:FF:FF
MacTabMatchWCID = 0
The new WDS interface MAC = FF:FF:FF:FF:FF:FF
MacTabMatchWCID = 0
The new WDS interface MAC = FF:FF:FF:FF:FF:FF
MacTabMatchWCID = 0
The new WDS interface MAC = FF:FF:FF:FF:FF:FF
MacTabMatchWCID = 0
Total allocated 4 WDS interfaces!
WtcSetMaxStaNum: MaxStaNum:87, BssidNum:1, WdsNum:4, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
red_is_enabled: set CR4/N9 RED Enable to 1.
cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
Correct apidx from 0 to 0 for WscUUIDInit
Generate UUID for apidx(0)
UUID: c01b35a0, len = 16
0x0000 : bc 32 9e 00 1d d8 11 b2 86 01 74 9d 79 xx xx 2d
device rai0 entered promiscuous mode
br0: port 2(rai0) entered forwarding state
br0: port 2(rai0) entered forwarding state
TX_BCN DESC a0cc4000 size = 320
RX[0] DESC a0cc8000 size = 2048
RX[1] DESC a0cc9000 size = 2048
E2pAccessMode=2
cfg_mode=9
cfg_mode=9
wmode_band_equal(): Band Equal!
APSDCapable[0]=0
APSDCapable[1]=0
APSDCapable[2]=0
APSDCapable[3]=0
APSDCapable[4]=0
APSDCapable[5]=0
APSDCapable[6]=0
APSDCapable[7]=0
APSDCapable[8]=0
APSDCapable[9]=0
APSDCapable[10]=0
APSDCapable[11]=0
APSDCapable[12]=0
APSDCapable[13]=0
APSDCapable[14]=0
APSDCapable[15]=0
default ApCliAPSDCapable[0]=0
Key1Str is Invalid key length(0) or Type(0)
Key1Str is Invalid key length(0) or Type(0)
Key2Str is Invalid key length(0) or Type(0)
Key2Str is Invalid key length(0) or Type(0)
Key3Str is Invalid key length(0) or Type(0)
Key3Str is Invalid key length(0) or Type(0)
Key4Str is Invalid key length(0) or Type(0)
Key4Str is Invalid key length(0) or Type(0)
FW Version:ap_pcie
FW Build Date:20160107100755
CmdAddressLenReq:(ret = 0)
CmdFwStartReq: override = 1, address = 1048576
CmdStartDLRsp: WiFI FW Download Success
AsicDMASchedulerInit(): DMA Scheduler Mode=0(LMAC)
efuse_probe: efuse = 10000002
RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
RtmpEepromGetDefault::e2p_dafault=1
RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
NVM is FLASH mode, flash_offset = 0x0
1. Phy Mode = 14
@@@ NICReadEEPROMParameters : pAd->FWLoad=0
Country Region from e2p = ffff
tssi_1_target_pwr_g_band = 36
2. Phy Mode = 14
3. Phy Mode = 14
NICInitPwrPinCfg(14): Not support for HIF_MT yet!
NICInitializeAsic(584): Not support rtmp_mac_sys_reset () for HIF_MT yet!
mt_mac_init()-->
mt7603_init_mac_cr()-->
AsicSetMacMaxLen(1826): Set the Max RxPktLen=1024!
<--mt_mac_init()
WTBL Segment 1 info:
MemBaseAddr/FID:0x28000/0
EntrySize/Cnt:32/128
WTBL Segment 2 info:
MemBaseAddr/FID:0x40000/0
EntrySize/Cnt:64/128
WTBL Segment 3 info:
MemBaseAddr/FID:0x42000/64
EntrySize/Cnt:64/128
WTBL Segment 4 info:
MemBaseAddr/FID:0x44000/128
EntrySize/Cnt:32/128
MtAsicACQueue: Write CR:21510, Value=10421
MtAsicACQueue: Write CR:21500, Value=10421
AntCfgInit(2567): Not support for HIF_MT yet!
RTMPSetPhyMode(): channel out of range, use first ch=0
MCS Set = ff ff 00 00 01
br0: port 2(rai0) entered forwarding state
[PMF]ap_pmf_init:: apidx=0, MFPC=0, MFPR=0, SHA256=0
[PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
[PMF]ap_pmf_init:: apidx=1, MFPC=0, MFPR=0, SHA256=0
AsicSetRalinkBurstMode(4148): Not support for HIF_MT yet!
RTMPSetPiggyBack(876): Not support for HIF_MT yet!
AsicSetTxPreamble(4135): Not support for HIF_MT yet!
AsicAddSharedKeyEntry(1992): Not support for HIF_MT yet!
The 4-BSSID mode is enabled, the BSSID byte5 MUST be the multiple of 4
AsicSetPreTbtt(): bss_idx=0, PreTBTT timeout = 0xa0
Main bssid = 74:9d:79:xx:xx:2b
<==== rt28xx_init, Status=0
@@@ ed_monitor_init : ===>
@@@ ed_monitor_init : <===
mt7603_set_ed_cca: TURN ON EDCCA mac 0x10618 = 0xd7c87d0f, EDCCA_Status=1
WiFi Startup Cost (ra0): 3.532s
device ra0 entered promiscuous mode
br0: port 3(ra0) entered forwarding state
br0: port 3(ra0) entered forwarding state
RTNETLINK answers: No such file or directory
RTNETLINK answers: No such file or directory
RTNETLINK answers: No such file or directory
ap_name=wlan_guest_portal, action=start
ap_name=qtbl, action=start
Insert quick routing module ...
<0> ######DUMP QUICK TABLE FUNC ADDR#######
<0> skb_dev_in_qtl:c308bf7c
<0> CheckSumModify:c308b000
<0> update_conntrack_time:c308c368
<0> matchFromLan:c308c7d4
<0> matchFromWan:c308c414
<0> doMatch:c308cb8c
<0> MyCheckSum:c308b104
<0> CheckSumDlt:c308b14c
<0> checkEntry:c308bdcc
<0> delEntry:c308b6f4
<0> addEntry:c308bc14
<0> checkValidQTEntry:c308b2f8
<0> updateQtlWhenPktXmit:c308c000
<0> qtbl_read_proc:c308b904
<0> qtbl_write_proc:c308b6a4
<0> ######DUMP QUICK TABLE FUNC ADDR END#######
ap_name=hw_nat, action=start
Ralink HW NAT Module Enabled
eth2 ifindex =5
eth3 ifindex =8
<0> file:net/nat/hw_nat/hwnat_ioctl.c, line:259, result:0.
Device Instance
WDEV 00:
Name:rai0
Wdev(list) Idx:0
Idx:4
***********dev->ifindex = 4
WDEV 01:
Name:wdsi0
Wdev(list) Idx:1
Idx:10
***********dev->ifindex = a
WDEV 02:
Name:wdsi1
Wdev(list) Idx:2
Idx:11
***********dev->ifindex = b
WDEV 03:
Name:wdsi2
Wdev(list) Idx:3
Idx:12
***********dev->ifindex = c
WDEV 04:
Name:wdsi3
Wdev(list) Idx:4
Idx:13
***********dev->ifindex = d
WDEV 05:
Name:apclii0
Wdev(list) Idx:5
Idx:14
***********dev->ifindex = e
WDEV 06:
WDEV 07:
WDEV 08:
WDEV 09:
WDEV 10:
WDEV 11:
WDEV 12:
WDEV 13:
WDEV 14:
WDEV 15:
WDEV 16:
WDEV 17:
WDEV 18:
WDEV 19:
WDEV 20:
WDEV 21:
Set HwnatEn = 1
ap_name=cron, action=start
ap_name=networkmap, action=start
sh: cannot create /proc/sys/kernel/disable_kswapd: nonexistent directory
nmap_main.c[main][82][46]:main pid 1669 ppid 1
nmap_active_detect.c[nmap_other_subnet_detect_func][592][46]:other subnet detect pid 1691 ppid 1690
nmap_main.c[nmap_wait_and_process_thread_func][449][46]:packet handle process pid 1695 ppid 1690
nmap_main.c[nmap_wait_and_process_thread_func][449][46]:packet handle process pid 1696 ppid 1690
nmap_main.c[nmap_wait_and_process_thread_func][449][46]:packet handle process pid 1698 ppid 1690
nmap_main.c[nmap_wait_and_process_thbr0: port 3(ra0) entered forwarding state
read_func][449][46]:packet handle process pid 1697 ppid 1690
nmap_main.c[nmap_wait_and_process_thread_func][449][46]:packet handle process pid 1699 ppid 1690
nmap_main.c[nmap_detect_thread_func][391][46]:active detect process pid 1700 ppid 1690
nmap_main.c[nmap_refresh_thread_func][403][46]:refresh process pid 1701 ppid 1690
nmap_main.c[nmap_server_thread_func][468][46]:server process pid 1702 ppid 1690
nmap_main.c[nmap_monitor_thread_func][458][46]:monitor process pid 1703 ppid 1690
nmap_main.c[nmap_detect_thread_func][391][46]:active detect process pid 1704 ppid 1690
ap_name=switch, action=start
ap_name=qos_service, action=start
ACL start
return num of index list == 7
ruleNum == 7
patternNum == 8
switch reg write offset=44, value=161117
switch reg write offset=2004, value=1ff0403
switch reg write offset=2104, value=2ff0403
switch reg write offset=2204, value=2ff0403
switch reg write offset=2304, value=2ff0403
switch reg write offset=2404, value=2ff0403
switch reg write offset=1600, value=80000000
switch reg write offset=1608, value=80000000
switch reg write offset=1610, value=80000000
switch reg write offset=1618, value=80000000
switch reg write offset=1620, value=80000000
switch reg write offset=1628, value=80000000
switch reg write offset=1630, value=80000000
switch reg write offset=1638, value=80000000
switch reg write offset=1500, value=80000000
switch reg write offset=1508, value=80000000
switch reg write offset=1510, value=80000000
switch reg write offset=1518, value=80000000
switch reg write offset=1520, value=80000000
switch reg write offset=1528, value=80000000
switch reg write offset=1530, value=80000000
switch reg write offset=1538, value=80000000
switch reg write offset=48, value=9080000
switch reg write offset=4c, value=1b581250
switch reg write offset=50, value=2da824a0
switch reg write offset=54, value=3ff836f0
Set: phy[0].reg[4] = 01e1
Set: phy[1].reg[4] = 01e1
Set: phy[2].reg[4] = 01e1
Set: phy[3].reg[4] = 01e1
Set: phy[4].reg[4] = 01e1
switch reg read offset=3608, value=3b
switch reg read offset=3508, value=3b
switch reg write offset=94, value=f000000
switch reg write offset=98, value=a1f00
switch reg write offset=90, value=8000503c
switch reg write offset=94, value=0
switch reg write offset=98, value=10000000
switch reg write offset=90, value=8000901e
switch reg write offset=94, value=1a000007
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b01e
switch reg write offsetInit Ingress Classify module ...
=94, value=ffff749d
switch reg write offset=98,Change WAN TR069 match from <0> to <1>
value=80f00
switch reg write offset=90, value=8000503d
switchChange l2tp control match from <0> to <1>
reg write offset=94, value=ffff792e
switch regChange iptv packet classify from <0> to <1>
write offset=98, value=80f02
switch reg write Change non ip packet classify from <0> to <0>
offset=90, value=8000503e
switch reg write offsChange dscp match from <0> to <1>
et=94, value=ffffe62b
switch reg write offset=98, value=80f04
Add dscp match from range idx=0,start_dscp=34,end_dscp=34
switch reg write offset=90, value=8000503f
switch reg write offset=94, value=ffff1d7b
switch reg write offset=98, value=c0100
switch reg write offset=90, value=80005008
swiChange RxRingThrehold from <512> to <1024>
tch reg write offset=94, value=fc0088
switch reg write offset=98, value=a1e00
switch reg write offset=90, value=80005007
switch reg write offset=94, value=1000100
switch reg write offset=98, value=81f00
switch reg write offset=90, value=80005006
switch reg write offset=94, value=ffff0035
switch reg write offset=98, value=cff00
switch reg write offset=90, value=80005005
switch reg write offset=94, value=ffffc021
switch reg write offset=98, value=d010a
switch reg write offset=90, value=80005004
switch reg write offset=94, value=ffffff03
switch reg write offset=98, value=d0108
switch reg write offset=90, value=80005003
switch reg write offset=94, value=80008000
switch reg write offset=98, value=d0100
switch reg write offset=90, value=80005002
switch reg write offset=94, value=ffff06a5
switch reg write offset=98, value=c0100
switch reg write offset=90, value=80005001
switch reg write offset=94, value=0
switch reg write offset=98, value=e0000000
switch reg write offset=90, value=8000901f
switch reg write offset=94, value=8000000
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b01f
switch reg write offset=94, value=80
switch reg write offset=98, value=0
switch reg write offset=90, value=80009006
switch reg write offset=94, value=c000040
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b006
switch reg write offset=94, value=40
switch reg write offset=98, value=0
switch reg write offset=90, value=80009005
switch reg write offset=94, value=e000060
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b005
switch reg write offset=94, value=120
switch reg write offset=98, value=0
switch reg write offset=90, value=80009004
switch reg write offset=94, value=d000050
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b004
switch reg write offset=94, value=2
switch reg write offset=98, value=0
switch reg write offset=90, value=80009003
switch reg write offset=94, value=b000030
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b003
switch reg write offset=94, value=1a
switch reg write offset=98, value=0
switch reg write offset=90, value=80009002
switch reg write offset=94, value=f000070
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b002
switch reg write offset=94, value=6
switch reg write offset=98, value=0
switch reg write offset=90, value=80009001
switch reg write offset=94, value=f000070
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b001
check iptablesbles and proc success
ESW: Link Status Changed - Port2 Link UP
ESW: Link Status Changed - Port2 Link Down