802.11ax Routers

Talking about ipq8074 that is the bigger brother of ipq6018

We are design hardware of IPQ8074. I have a fork of code for IPQ8074 qsdk, you can take a look

发自我的iPhone

------------------ Original ------------------

2 Likes

Did you harvest the openwrt mailing list for addresses to send your spam to? I've had no interaction with your company and i received several emails. Terrible business tactic.

5 Likes

Belkin RT3200 AX3200 and Linksys E8450 AX3200 appear to be clones of each other (they even share basically the same manual), and are available for purchase in the US. (Looking it up just now, didn’t realize Belkin bought Linksys.) The Belkin is even on sale currently for $80.


According to acwifi.net, it’s a MT7622 + MT7915A combo, so decent chance it might be supported by OpenWrt sometime down the line?

Another candidate with MT7621A + MT7905 + MT7975

Edit: And another one with MT7621A + MT7915DA + MT7975DN

Edit 2: This too... Seems like Mediatek 802.11ax routers flooding the market.



From IRC:

05:25 < nbd> i'm currently working on 802.11->802.3 decap offload
05:25 < nbd> will try to take care of that patch afterwards
05:27 < nbd> i will work on that as well
05:27 < nbd> pablo will send our work on NAT offload (with my rewritten driver for MTK) upstream soon
05:28 < nbd> once that's in the tree, i can build on that for eth<->wifi offload
05:29 < nbd> it will be supported for mt7622 on the SoC side and 7915 for wifi
05:29 < nbd> maybe also 7615 later, not sure how much offload that one supports
05:30 < nbd> either way, 7915 will be the first wifi chip to have upstream eth<->wifi offload support
05:30 < nbd> for 1500 byte sized packets, the difference between SW and HW is small
05:31 < nbd> for smaller packets, offload will help
05:31 < nbd> sw performance is currently around 1700-1800 mbit/s under ideal conditions
05:32 < nbd> but still lower when sending to more stations at the same time
05:32 < nbd> not sure how much of that is sw limitation
05:33 < nbd> 4x4 80 MHz
05:33 < nbd> or 2x2 160 MHz
05:35 < rsalvaterra> nbd: You mean encapsulation offloading?
05:36 < nbd> rsalvaterra: nope
05:36 < nbd> encap offload is already done
05:36 < nbd> so i'm working on decap now
05:38 < nbd> the hw supports it, not sure how much of the code for it is upstream
05:38 < nbd> when i worked on the patch, only ath11k had upstream support
08:16 < dengqf6> nbd: Hauke: what about mt7621?
4 Likes

The Belkin RT3200 is also available in UK. I bought it few weeks ago, but for various reason I will receive it in January.

I've got a linksys e7350 has the mt7621 and 7915 for wifi, also linksys provide the GPL code .
They are using lede 17.01 on their firmware and I was able to edit opkg feeds and install some packages.

~ # uname -a
Linux (none) 4.4.177 #0 SMP Mon Jun 8 10:48:25 UTC 2020 mips GNU/Linux
~ # opkg update
Downloading http://downloads.lede-project.org/releases/17.01-SNAPSHOT/targets/ramips/mt7621/packages/Packages.gz
Updated list of available packages in /var/opkg-lists/reboot_core
Downloading http://downloads.lede-project.org/releases/17.01-SNAPSHOT/targets/ramips/mt7621/packages/Packages.sig
Signature check passed.
~ # cat /proc/cmdline
console=ttyS0,115200 rootfstype=squashfs,jffs2
~ # cat /proc/mtd
dev:    size   erasesize  name
mtd0: 00080000 00020000 "Bootloader"
mtd1: 00080000 00020000 "Config"
mtd2: 00080000 00020000 "Factory"
mtd3: 03000000 00020000 "firmware"
mtd4: 03000000 00020000 "firmware_2"
mtd5: 00360000 00020000 "kernel"
mtd6: 02ca0000 00020000 "rootfs"
mtd7: 01a80000 00020000 "rootfs_data"
mtd8: 00080000 00020000 "CBTinfo"
# dtc -I fs -O dts /sys/firmware/devicetree/base
Warning (reg_format): "reg" property in /palmbus@1e000000/nand@3000/flash@0 has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
Warning (unit_address_vs_reg): Node /pcie@1e140000/pcie0 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /cpus/cpu@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /cpus/cpu@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sysclock50M@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /apll@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sysclock125M@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sysbusclock@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /cpuclock@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /cpuintc@0 has a unit name, but no reg property
/dts-v1/;

/ {
        model = "MediaTek MT7621 RFB (802.11ax,NAND)";
        compatible = "mediatek,mt7621-rfb-ax-nand", "mediatek,mt7621-soc";
        #address-cells = <0x1>;
        #size-cells = <0x1>;

        gsw {
                mediatek,mdio = <0xc>;
                mediatek,mcm;
                compatible = "mediatek,mt753x";
                mt7530,direct-phy-access;
                reset-names = "mcm";
                mediatek,portmap = "llllw";
                resets = <0x2 0x2>;
                #address-cells = <0x1>;
                #size-cells = <0x0>;

                port@5 {
                        reg = <0x5>;
                        compatible = "mediatek,mt753x-port";
                        phy-mode = "rgmii";

                        fixed-link {
                                full-duplex;
                                speed = <0x3e8>;
                        };
                };

                port@6 {
                        reg = <0x6>;
                        compatible = "mediatek,mt753x-port";
                        phy-mode = "trgmii";

                        fixed-link {
                                full-duplex;
                                speed = <0x3e8>;
                        };
                };

                mdio-bus {
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                };
        };

        pcie@1e140000 {
                reg = <0x1e140000 0x40000>;
                interrupts = <0x0 0x4 0x4 0x0 0x18 0x4 0x0 0x19 0x4>;
                pinctrl-0 = <0xd>;
                compatible = "mediatek,mt7621-pci";
                clock-names = "pcie0", "pcie1", "pcie2";
                reset-gpios = <0xf 0x13 0x1>;
                reset-names = "pcie0", "pcie1", "pcie2";
                bus-range = <0x0 0xff>;
                device_type = "pci";
                clocks = <0xe 0x18 0xe 0x19 0xe 0x1a>;
                reset-gpio-names = "pcie0";
                ranges = <0x2000000 0x0 0x0 0x60000000 0x0 0x10000000 0x1000000 0x0 0x0 0x1e160000 0x0 0x10000>;
                resets = <0x2 0x18 0x2 0x19 0x2 0x1a>;
                status = "okay";
                #address-cells = <0x3>;
                #size-cells = <0x2>;
                pinctrl-names = "default";
                interrupt-parent = <0x5>;

                pcie0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        device_type = "pci";
                        #address-cells = <0x3>;
                        #size-cells = <0x2>;
                };
        };

        cpus {

                cpu@0 {
                        compatible = "mips,mips1004Kc";
                };

                cpu@1 {
                        compatible = "mips,mips1004Kc";
                };
        };

        sdhci@1e130000 {
                reg = <0x1e130000 0x4000>;
                interrupts = <0x0 0x14 0x4>;
                compatible = "mediatek,mt7621-sdhci";
                status = "disabled";
                interrupt-parent = <0x5>;
        };

        usb-phy@1e1d0000 {
                reg = <0x1e1d0000 0x300>;
                compatible = "mediatek,mt7621-u3phy", "mediatek,mt2701-u3phy";
                ranges;
                status = "okay";
                #address-cells = <0x1>;
                #size-cells = <0x1>;

                usb-phy@0x1e1d0800 {
                        reg = <0x1e1d0800 0x100>;
                        clock-names = "ref";
                        #phy-cells = <0x1>;
                        clocks = <0x10>;
                        phandle = <0x11>;
                        linux,phandle = <0x11>;
                };

                usb-phy@0x1e1d0900 {
                        reg = <0x1e1d0900 0x700>;
                        clock-names = "ref";
                        #phy-cells = <0x1>;
                        clocks = <0x10>;
                        phandle = <0x12>;
                        linux,phandle = <0x12>;
                };

                usb-phy@0x1e1d1000 {
                        reg = <0x1e1d1000 0x100>;
                        clock-names = "ref";
                        #phy-cells = <0x1>;
                        clocks = <0x10>;
                        phandle = <0x13>;
                        linux,phandle = <0x13>;
                };
        };

        hnat@1e100000 {
                reg = <0x1e100000 0x3000>;
                mtketh-ppd = "eth0";
                mtketh-wan = "eth1";
                compatible = "mediatek,mtk-hnat_v1";
                reset-names = "mtketh";
                resets = <0xb 0x0>;
                status = "okay";
                ext-devices = "rax0", "ra0", "rax1", "ra1", "rax2", "ra2", "rax3", "ra3", "apclix0", "apcli0";
                mtketh-max-gmac = <0x2>;
        };

        rstctrl {
                #reset-cells = <0x1>;
                compatible = "ralink,rt2880-reset";
                phandle = <0x2>;
                linux,phandle = <0x2>;
        };

        sysclock50M@0 {
                #clock-cells = <0x0>;
                compatible = "fixed-clock";
                clock-frequency = <0x2faf080>;
                phandle = <0x1>;
                linux,phandle = <0x1>;
        };

        apll@0 {
                #clock-cells = <0x0>;
                compatible = "fixed-clock";
                clock-frequency = <0x1017df80>;
                phandle = <0x4>;
                linux,phandle = <0x4>;
        };

        chosen {
                bootargs = "console=ttyS0,115200";
                bootfrom = [32 00];
        };

        raeth@1e100000 {
                reg = <0x1e100000 0xe000>;
                interrupts = <0x0 0x3 0x4>;
                compatible = "mediatek,mt7621-eth";
                status = "disabled";
                mediatek,ethsys = <0xb>;
                interrupt-parent = <0x5>;
        };

        gpio-keys-polled {
                compatible = "gpio-keys-polled";
                poll-interval = <0x14>;
                #address-cells = <0x1>;
                #size-cells = <0x0>;

                wps {
                        gpios = <0xf 0x12 0x1>;
                        label = "wps";
                        linux,code = <0x211>;
                };

                reset {
                        gpios = <0xf 0x6 0x1>;
                        label = "reset";
                        linux,code = <0x198>;
                };
        };

        gpio-leds {
                compatible = "gpio-leds";

                indicator {
                        gpios = <0xf 0x7 0x0>;
                        label = "usb_en";
                };
        };

        palmbus@1e000000 {
                reg = <0x1e000000 0x100000>;
                compatible = "palmbus";
                ranges = <0x0 0x1e000000 0xfffff>;
                #address-cells = <0x1>;
                #size-cells = <0x1>;

                nand@3000 {
                        reg = <0x3000 0x800>;
                        pinctrl-0 = <0xa>;
                        ecc-engine = <0x9>;
                        compatible = "mediatek,mt7621-nfc";
                        status = "okay";
                        #address-cells = <0x1>;
                        #size-cells = <0x1>;
                        pinctrl-names = "default";

                        flash@0 {
                                reg = <0x0>;
                                nand-ecc-mode = "hw";

                                partitions {
                                        compatible = "fixed-partitions";
                                        #address-cells = <0x1>;
                                        #size-cells = <0x1>;

                                        partition@100000 {
                                                reg = <0x100000 0x80000>;
                                                label = "Factory";
                                        };

                                        partition@180000 {
                                                reg = <0x180000 0x3000000>;
                                                label = "firmware";
                                        };

                                        partition@3180000 {
                                                reg = <0x3180000 0x3000000>;
                                                label = "firmware_2";
                                        };

                                        partition@0 {
                                                reg = <0x0 0x80000>;
                                                label = "Bootloader";
                                                read-only;
                                        };

                                        partition@6180000 {
                                                reg = <0x6180000 0x80000>;
                                                label = "CBTinfo";
                                        };

                                        partition@80000 {
                                                reg = <0x80000 0x80000>;
                                                label = "Config";
                                        };
                                };
                        };
                };

                i2c@900 {
                        reg = <0x900 0x100>;
                        pinctrl-0 = <0x3>;
                        compatible = "mediatek,mt7621-i2c";
                        reset-names = "i2c";
                        clocks = <0x1>;
                        resets = <0x2 0x10>;
                        status = "disabled";
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                        pinctrl-names = "default";
                };

                i2s@a00 {
                        reg = <0xa00 0x100>;
                        dmas = <0x6 0x4 0x6 0x6>;
                        interrupts = <0x0 0x10 0x4>;
                        txdma-req = <0x2>;
                        compatible = "mediatek,mt7621-i2s";
                        reset-names = "i2s";
                        clocks = <0x4>;
                        resets = <0x2 0x11>;
                        status = "disabled";
                        rxdma-req = <0x3>;
                        dma-names = "tx", "rx";
                        interrupt-parent = <0x5>;
                };

                spi@b00 {
                        reg = <0xb00 0x100>;
                        pinctrl-0 = <0x8>;
                        compatible = "mediatek,mt7621-spi";
                        reset-names = "spi";
                        clocks = <0x7>;
                        resets = <0x2 0x12>;
                        status = "disabled";
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                        pinctrl-names = "default";
                };

                uartlite@c00 {
                        reg = <0xc00 0x100>;
                        interrupts = <0x0 0x1a 0x4>;
                        reg-shift = <0x2>;
                        no-loopback-test;
                        compatible = "mediatek,mt6577-uart", "ns16550a";
                        clock-frequency = <0x2faf080>;
                        clocks = <0x1>;
                        reg-io-width = <0x4>;
                        interrupt-parent = <0x5>;
                };

                gdma@2800 {
                        reg = <0x2800 0x800>;
                        interrupts = <0x0 0xd 0x4>;
                        compatible = "mtk,rt3883-gdma";
                        reset-names = "dma";
                        #dma-requests = <0x10>;
                        resets = <0x2 0xe>;
                        status = "disabled";
                        #dma-channels = <0x10>;
                        #dma-cells = <0x1>;
                        phandle = <0x6>;
                        linux,phandle = <0x6>;
                        interrupt-parent = <0x5>;
                };

                sysc@0 {
                        reg = <0x0 0x100>;
                        compatible = "mtk,mt7621-sysc";
                };

                memc@5000 {
                        reg = <0x5000 0x1000>;
                        compatible = "mtk,mt7621-memc";
                };

                uartfull@d00 {
                        reg = <0xd00 0x100>;
                        interrupts = <0x0 0x1b 0x4>;
                        reg-shift = <0x2>;
                        no-loopback-test;
                        compatible = "mediatek,mt6577-uart", "ns16550a";
                        clock-frequency = <0x2faf080>;
                        clocks = <0x1>;
                        status = "okay";
                        reg-io-width = <0x4>;
                        interrupt-parent = <0x5>;
                };

                uartfull@e00 {
                        reg = <0xe00 0x100>;
                        interrupts = <0x0 0x1c 0x4>;
                        reg-shift = <0x2>;
                        no-loopback-test;
                        compatible = "mediatek,mt6577-uart", "ns16550a";
                        clock-frequency = <0x2faf080>;
                        clocks = <0x1>;
                        status = "okay";
                        reg-io-width = <0x4>;
                        interrupt-parent = <0x5>;
                };

                ecc@3800 {
                        reg = <0x3800 0x800>;
                        compatible = "mediatek,mt7621-ecc";
                        status = "okay";
                        phandle = <0x9>;
                        linux,phandle = <0x9>;
                };

                wdt@100 {
                        reg = <0x100 0x100>;
                        compatible = "mtk,mt7621-wdt";
                };

                hsdma@7000 {
                        reg = <0x7000 0x1000>;
                        interrupts = <0x0 0xb 0x4>;
                        compatible = "mediatek,mt7621-hsdma";
                        reset-names = "hsdma";
                        #dma-requests = <0x1>;
                        resets = <0x2 0x5>;
                        status = "disabled";
                        #dma-channels = <0x1>;
                        #dma-cells = <0x1>;
                        interrupt-parent = <0x5>;
                };

                gpio@600 {
                        reg = <0x600 0x100>;
                        compatible = "mtk,mt7621-gpio";
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;

                        bank@0 {
                                reg = <0x0>;
                                #gpio-cells = <0x2>;
                                compatible = "mtk,mt7621-gpio-bank";
                                phandle = <0xf>;
                                gpio-controller;
                                linux,phandle = <0xf>;
                        };

                        bank@1 {
                                reg = <0x1>;
                                #gpio-cells = <0x2>;
                                compatible = "mtk,mt7621-gpio-bank";
                                gpio-controller;
                        };

                        bank@2 {
                                reg = <0x2>;
                                #gpio-cells = <0x2>;
                                compatible = "mtk,mt7621-gpio-bank";
                                gpio-controller;
                        };
                };
        };

        ethernet@1e100000 {
                reg = <0x1e100000 0xe000>;
                interrupts = <0x0 0x3 0x4>;
                compatible = "mediatek,mt7621-eth", "syscon";
                status = "okay";
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                mediatek,ethsys = <0xb>;
                interrupt-parent = <0x5>;

                mac@0 {
                        reg = <0x0>;
                        compatible = "mediatek,eth-mac";
                        phy-mode = "trgmii";

                        fixed-link {
                                full-duplex;
                                pause;
                                speed = <0x3e8>;
                        };
                };

                mac@1 {
                        reg = <0x1>;
                        compatible = "mediatek,eth-mac";
                        phy-mode = "rgmii";

                        fixed-link {
                                full-duplex;
                                pause;
                                speed = <0x3e8>;
                        };
                };

                mdio-bus {
                        #address-cells = <0x1>;
                        phandle = <0xc>;
                        #size-cells = <0x0>;
                        linux,phandle = <0xc>;

                        ethernet-phy@1f {
                                reg = <0x1f>;
                                phy-mode = "rgmii";
                        };
                };
        };

        sysclock125M@0 {
                #clock-cells = <0x0>;
                compatible = "fixed-clock";
                clock-frequency = <0x7735940>;
                phandle = <0x10>;
                linux,phandle = <0x10>;
        };

        aliases {
                serial0 = "/palmbus@1e000000/uartlite@c00";
        };

        interrupt-controller@1fbc0000 {
                reg = <0x1fbc0000 0x2000>;
                compatible = "mti,gic";
                mti,reserved-cpu-vectors = <0x7>;
                #interrupt-cells = <0x3>;
                phandle = <0x5>;
                interrupt-controller;
                linux,phandle = <0x5>;

                timer {
                        interrupts = <0x1 0x1 0x0>;
                        compatible = "mti,gic-timer";
                        clocks = <0x14>;
                };
        };

        pinctrl {
                pinctrl-0 = <0x15>;
                compatible = "mtk,mtkmips-pinmux";
                pinctrl-names = "default";

                i2c {
                        phandle = <0x3>;
                        linux,phandle = <0x3>;

                        i2c {
                                mtk,function = "i2c";
                                mtk,group = "i2c";
                        };
                };

                spi {
                        phandle = <0x8>;
                        linux,phandle = <0x8>;

                        spi {
                                mtk,function = "spi";
                                mtk,group = "spi";
                        };
                };

                mdio {

                        mdio {
                                mtk,function = "mdio";
                                mtk,group = "mdio";
                        };
                };

                nand {
                        phandle = <0xa>;
                        linux,phandle = <0xa>;

                        sdhci-nand {
                                mtk,function = "nand2";
                                mtk,group = "sdhci";
                        };

                        spi-nand {
                                mtk,function = "nand1";
                                mtk,group = "spi";
                        };
                };

                pcie {
                        phandle = <0xd>;
                        linux,phandle = <0xd>;

                        pcie {
                                mtk,function = "gpio";
                                mtk,group = "pcie";
                        };
                };

                sdhci {

                        sdhci {
                                mtk,function = "sdhci";
                                mtk,group = "sdhci";
                        };
                };

                uart1 {

                        uart1 {
                                mtk,function = "uart1";
                                mtk,group = "uart1";
                        };
                };

                uart2 {

                        uart2 {
                                mtk,function = "uart2";
                                mtk,group = "uart2";
                        };
                };

                uart3 {

                        uart3 {
                                mtk,function = "uart3";
                                mtk,group = "uart3";
                        };
                };

                pinctrl0 {
                        phandle = <0x15>;
                        linux,phandle = <0x15>;

                        gpio {
                                mtk,function = "gpio";
                                mtk,group = "i2c", "uart3", "jtag";
                        };

                        uart2 {
                                mtk,function = "uart2";
                                mtk,group = "uart2";
                        };
                };

                rgmii1 {

                        rgmii1 {
                                mtk,function = "rgmii1";
                                mtk,group = "rgmii1";
                        };
                };

                rgmii2 {

                        rgmii2 {
                                mtk,function = "rgmii2";
                                mtk,group = "rgmii2";
                        };
                };
        };

        ethsys@1e000000 {
                reg = <0x1e000000 0x8000>;
                compatible = "mediatek,mt7621-ethsys", "syscon";
                phandle = <0xb>;
                linux,phandle = <0xb>;
        };

        usb@1e1c0000 {
                reg = <0x1e1c0000 0x1000 0x1e1d0700 0x100>;
                phys = <0x11 0x3 0x12 0x4 0x13 0x3>;
                interrupts = <0x0 0x16 0x4>;
                reg-names = "mac", "ippc";
                compatible = "mediatek,mt7621-xhci", "mediatek,mt2701-xhci";
                clock-names = "sys_ck", "free_ck", "ahb_ck", "dma_ck";
                clocks = <0x10 0x10 0x10 0x10>;
                status = "okay";
                interrupt-parent = <0x5>;
        };

        sysbusclock@0 {
                #clock-cells = <0x0>;
                compatible = "mtk,mt7621-sys-bus-clock";
                phandle = <0x7>;
                linux,phandle = <0x7>;
        };

        cpuclock@0 {
                #clock-cells = <0x0>;
                compatible = "mtk,mt7621-cpu-clock";
                phandle = <0x14>;
                linux,phandle = <0x14>;
        };

        cpuintc@0 {
                compatible = "mti,cpu-interrupt-controller";
                #interrupt-cells = <0x1>;
                #address-cells = <0x0>;
                interrupt-controller;
        };

        clkctrl {
                #clock-cells = <0x1>;
                compatible = "ralink,rt2880-clock";
                phandle = <0xe>;
                linux,phandle = <0xe>;
        };
};
4 Likes

MT7915DAN Datasheet (MT7915DAN datasheet)

qnap came up with best router on the market, and it also have qualcom ipq8072a cpu with two 10gbe ports https://www.qnap.com/pl-pl/product/qhora-301w/specs/hardware , i'm considering to buy it

The TL-XDR3230 is an interesting case though. I'm not entirely sure one can call it a true 11ax router as only the 5ghz radio is 11ax capable.

The 2.4ghz radio is the SoC's one, to my knowledge. While it is a 4x4 radio, supports 256-qam and (to my knowledge) is supported by the mt7615 code in mt76...

It's still just a B/G/N radio.

However, it does seem like a candidate for a OpenWrt port, as I believe all the hardware has support in master, to my knowledge. SPI flash should be easy to access too if required. (However opening the case is a destructive process it appears)

Edit: Don't buy, TP-Link have locked down the bootloader with stupidity.

Xiaomi is releasing WIFI 6E router.

Dear all,
How is it possible to list all AX routers already supported by OpenWrt? I tried this filter, but it lists only two I-O Data WN-AXnnn devices. Is that current state of art?
Thanks in advance!

Those are plain AC devices. Click on the link in the last column, and you'll see.

AFAIK there is not a single AX router supported yet. There's development on a few, yes. The first AX AP though got merged: UniFi 6 Lite.

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There are no ax routers supported by 19.07, but snapshot support is rolling in. E.g. Linksys E7350 or D-Link DIR-X1860 interest

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Netgear have announced a Wifi 6E router: https://www.netgear.com/home/wifi/routers/raxe500

RAXE500 data at FCC:

(Apparently no internal photos, yet)

quadcore 1.8GHz so it will sadly be broadcom

Qualcomm Wifi 6e pro 610 and pro 810 has also 1,8 Ghz quad core:

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Linksys has also announced a wifi 6e router, AXE8400:

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