Your ag7100_phy.h hardcodes the "active" PHY to the kzh_phy.   I have modified your tarball from yesterday and have a cleanly building ipPlus PHY that seems to work in that it correctly reports links speed.  I still can't get packets in or out, but at least the PHY is happier.  I'm currently working on inserting the ipPlus init code into the driver.

Forgot to mention that I would love to share by snapshot but have nowhere to share it from.  Any suggestions?

Hi All,

I did some reverse enginering about RB433 and ICPlus Phy. Here comes some info:
- AR7100 MAC0 is connected to IP175C's Port5 (CPU Port)
- AR7100 MAC1 is connected to IP175C's Phy4 (Port4) - this is RB433's POE port
- IP175C's Port1 and Port2 are connected to ports on the right of RB433
- Port1, Port2 and Port5 must be in the same VLAN

The following list is RB433's IP175C register dump:

PHY state for PHY0 (enet0, phyBase 0x       0, phyAddr 0x0)
PHY Registers:
Reg 00 (0x00) PHY Control                      = 0x00003100
Reg 01 (0x01) PHY Status                       = 0x00007849
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1
Reg 05 (0x05) Link Partner Ability             = 0x00000000
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000

PHY state for PHY1 (enet0, phyBase 0x       0, phyAddr 0x1)
PHY Registers:
Reg 00 (0x00) PHY Control                      = 0x00003100
Reg 01 (0x01) PHY Status                       = 0x00007849
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1
Reg 05 (0x05) Link Partner Ability             = 0x00000000
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000

PHY state for PHY2 (enet0, phyBase 0x       0, phyAddr 0x2)
PHY Registers:
Reg 00 (0x00) PHY Control                      = 0x00003100
Reg 01 (0x01) PHY Status                       = 0x00007849
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1
Reg 05 (0x05) Link Partner Ability             = 0x00000000
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000

PHY state for PHY3 (enet0, phyBase 0x       0, phyAddr 0x3)
PHY Registers:
Reg 00 (0x00) PHY Control                      = 0x00003100
Reg 01 (0x01) PHY Status                       = 0x00007849
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1
Reg 05 (0x05) Link Partner Ability             = 0x00000000
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000

PHY state for PHY4 (enet0, phyBase 0x       0, phyAddr 0x0)
PHY Registers:
Reg 00 (0x00) PHY Control                      = 0x00003100
Reg 01 (0x01) PHY Status                       = 0x00007849
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1
Reg 05 (0x05) Link Partner Ability             = 0x00000000
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000

Switch Global Registers:
Phy29 Registers:
Reg 18 (0x12) 29_18_REG    = 0x0000cc08
Reg 19 (0x13) 29_19_REG    = 0x00008080
Reg 20 (0x14) 29_20_REG    = 0x00008080
Reg 21 (0x15) 29_21_REG    = 0x00008000
Reg 22 (0x16) 29_22_REG    = 0x00000420
Reg 23 (0x17) 29_23_REG    = 0x000007c2

Reg 24 (0x18) 29_24_REG    = 0x0000ffff
Reg 25 (0x19) 29_25_REG    = 0x0000ffff
Reg 26 (0x1a) 29_26_REG    = 0x0000ffff
Reg 27 (0x1b) 29_27_REG    = 0x0000ffff
Reg 28 (0x1c) 29_28_REG    = 0x0000ffff

Reg 29 (0x1d) 29_29_REG    = 0x0000403f
Reg 30 (0x1e) 29_30_REG    = 0x0000ffff
Reg 31 (0x1f) 29_31_REG    = 0x0000175c
Phy30 Registers:
Reg 00 (0x00) 30_0_REG     = 0x00008014
Reg 01 (0x01) 30_1_REG     = 0x00002f3f
Reg 02 (0x02) 30_2_REG     = 0x00003f30
Reg 03 (0x03) 30_3_REG     = 0x00003f3f
Reg 04 (0x04) 30_4_REG     = 0x00003f3f
Reg 05 (0x05) 30_5_REG     = 0x00003f3f
Reg 06 (0x06) 30_6_REG     = 0x00003f3f
Reg 07 (0x07) 30_7_REG     = 0x00003f3f
Reg 08 (0x08) 30_8_REG     = 0x00003f3f

Reg 09 (0x09) 30_9_REG     = 0x00000005

Reg 10 (0x0a) 30_10_REG    = 0x00000000
Reg 11 (0x0b) 30_11_REG    = 0x00000000

Reg 12 (0x0c) 30_12_REG    = 0x000000a2

Reg 13 (0x0d) 30_13_REG    = 0x0000000f
Reg 16 (0x10) 30_16_REG    = 0x0000009f
Reg 17 (0x11) 30_17_REG    = 0x00000000
Reg 18 (0x12) 30_18_REG    = 0x00006900
Reg 20 (0x14) 30_20_REG    = 0x00000000
Reg 21 (0x15) 30_21_REG    = 0x0000c200
Reg 22 (0x16) 30_22_REG    = 0x00000180
Reg 23 (0x17) 30_23_REG    = 0x00000000
Reg 24 (0x18) 30_24_REG    = 0x00000000
Reg 25 (0x19) 30_25_REG    = 0x00000000
Reg 26 (0x1a) 30_26_REG    = 0x00000000
Reg 27 (0x1b) 30_27_REG    = 0x00000100
Reg 28 (0x1c) 30_28_REG    = 0x00000000
Reg 29 (0x1d) 30_29_REG    = 0x00000000
Reg 30 (0x1e) 30_30_REG    = 0x00000000
Reg 31 (0x1f) 30_31_REG    = 0x00000000
Phy31 Registers:
Reg 00 (0x00) 31_0_REG     = 0x00000000
Reg 01 (0x01) 31_1_REG     = 0x00000000
Reg 02 (0x02) 31_2_REG     = 0x00000000
Reg 03 (0x03) 31_3_REG     = 0x0000ff60
Reg 04 (0x04) 31_4_REG     = 0x0000ff61
Reg 05 (0x05) 31_5_REG     = 0x000091f0
Reg 06 (0x06) 31_6_REG     = 0x0000c003

If anyone is interested in how to dump any register or memory region from RouterOS I can explain it.

Flam,

I am trying to do the same as you for the RB450 but have a couple of questions.

- When you refer to the AR7100's MAC0 and MAC1 above, are you actually referring to the AR7100's MII0 and MII1 interfaces?
- I would love to find out how to dump the registers from my 450
- When I try to dump the 450 registers from my OpenWRT build, I get a lot of invalid values, especially in the switch registers (29-31).  The values returned are 0xffff.  I am suspecting that the ag7100.c ag7100_mii_write and ag7100_mii_read functions are placing the phy_addr in the wrong place in the bitmask, but I am not sure.  Any ideas?

thanks.

Here is a copy of my reg dump from OpenWRT for the RB450:

Things I noticed:
- For the switch registers, regardless of where PHY 29, 30 or 31 are selected, the registers from PHY 29 are returned.  This causes the attempted read from 30_0 through 30_17 and 31_0 through 31_6 to fail (29_0 through 29_17 are invalid).
- The PHY states for PHY0 through PHY4 are identical, even though only PHY4 has a cable plugged in.  This makes me believe that the PHY selection is very broken.

PHY Registers:                                                                 
Reg 00 (0x00) PHY Control                      = 0x00001000                     
Reg 01 (0x01) PHY Status                       = 0x00007849                     
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243                     
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80                     
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1                     
Reg 05 (0x05) Link Partner Ability             = 0x00000000                     
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000                     
PHY state for PHY1 (enet1, phyBase 0x00000000, phyAddr 0x1)                     
PHY Registers:                                                                 
Reg 00 (0x00) PHY Control                      = 0x00001000                     
Reg 01 (0x01) PHY Status                       = 0x00007849                     
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243                     
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80                     
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1                     
Reg 05 (0x05) Link Partner Ability             = 0x00000000                     
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000                     
PHY state for PHY2 (enet1, phyBase 0x00000000, phyAddr 0x2)                     
PHY Registers:                                                                 
Reg 00 (0x00) PHY Control                      = 0x00001000                     
Reg 01 (0x01) PHY Status                       = 0x00007849                     
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243                     
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80                     
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1                     
Reg 05 (0x05) Link Partner Ability             = 0x00000000                     
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000                     
PHY state for PHY3 (enet1, phyBase 0x00000000, phyAddr 0x3)                     
PHY Registers:                                                                 
Reg 00 (0x00) PHY Control                      = 0x00001000                     
Reg 01 (0x01) PHY Status                       = 0x00007849                     
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243                     
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80                     
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1                     
Reg 05 (0x05) Link Partner Ability             = 0x00000000                     
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000                     
PHY state for PHY4 (enet0, phyBase 0x00000000, phyAddr 0x4)                     
PHY Registers:                                                                 
Reg 00 (0x00) PHY Control                      = 0x00001000                     
Reg 01 (0x01) PHY Status                       = 0x00007849                     
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243                     
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80                     
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1                     
Reg 05 (0x05) Link Partner Ability             = 0x00000000                     
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000                     
PHY state for PHY5 (enet0, phyBase 0x00000000, phyAddr 0x0)                     
PHY Registers:                                                                 
Reg 00 (0x00) PHY Control                      = 0x00001000                     
Reg 01 (0x01) PHY Status                       = 0x00007849                     
Reg 02 (0x02) PHY Identifier 1                 = 0x00000243                     
Reg 03 (0x03) PHY Identifier 2                 = 0x00000d80                     
Reg 04 (0x04) Auto-Negotiation Advertisement   = 0x000001e1                     
Reg 05 (0x05) Link Partner Ability             = 0x00000000                     
Reg 06 (0x06) Auto-Negotiation Expansion       = 0x00000000                     
Switch Global Registers:                                                       
Phy29 Registers:                                                               
Reg 18 (0x12) 29_18_REG    = 0x0000cc08                                         
Reg 19 (0x13) 29_19_REG    = 0x00009f9f                                         
Reg 20 (0x14) 29_20_REG    = 0x00009f9f                                         
Reg 21 (0x15) 29_21_REG    = 0x00009f00                                         
Reg 22 (0x16) 29_22_REG    = 0x00000420                                         
Reg 23 (0x17) 29_23_REG    = 0x00000000                                         
Reg 24 (0x18) 29_24_REG    = 0x00000001                                         
Reg 25 (0x19) 29_25_REG    = 0x00000001                                         
Reg 26 (0x1a) 29_26_REG    = 0x00000001                                         
Reg 27 (0x1b) 29_27_REG    = 0x00000001                                         
Reg 28 (0x1c) 29_28_REG    = 0x00000001                                         
Reg 29 (0x1d) 29_29_REG    = 0x0000403f                                         
Reg 30 (0x1e) 29_30_REG    = 0x00000002                                         
Reg 31 (0x1f) 29_31_REG    = 0x0000175a                                         
Phy30 Registers:                                                               
Reg 00 (0x00) 30_0_REG     = 0x0000ffff                                         
Reg 01 (0x01) 30_1_REG     = 0x0000ffff                                         
Reg 02 (0x02) 30_2_REG     = 0x0000ffff                                         
Reg 03 (0x03) 30_3_REG     = 0x0000ffff                                         
Reg 04 (0x04) 30_4_REG     = 0x0000ffff                                         
Reg 05 (0x05) 30_5_REG     = 0x0000ffff                                         
Reg 06 (0x06) 30_6_REG     = 0x0000ffff                                         
Reg 07 (0x07) 30_7_REG     = 0x0000ffff                                         
Reg 08 (0x08) 30_8_REG     = 0x0000ffff                                         
Reg 09 (0x09) 30_9_REG     = 0x0000ffff                                         
Reg 10 (0x0a) 30_10_REG    = 0x0000ffff                                         
Reg 11 (0x0b) 30_11_REG    = 0x0000ffff                                         
Reg 12 (0x0c) 30_12_REG    = 0x0000ffff                                         
Reg 13 (0x0d) 30_13_REG    = 0x0000ffff                                         
Reg 16 (0x10) 30_16_REG    = 0x0000ffff                                         
Reg 17 (0x11) 30_17_REG    = 0x0000ffff                                         
Reg 18 (0x12) 30_18_REG    = 0x0000cc08                                         
Reg 20 (0x14) 30_20_REG    = 0x00009f9f                                         
Reg 21 (0x15) 30_21_REG    = 0x00009f00                                         
Reg 22 (0x16) 30_22_REG    = 0x00000420                                         
Reg 23 (0x17) 30_23_REG    = 0x00000000                                         
Reg 24 (0x18) 30_24_REG    = 0x00000001                                         
Reg 25 (0x19) 30_25_REG    = 0x00000001                                         
Reg 26 (0x1a) 30_26_REG    = 0x00000001                                         
Reg 27 (0x1b) 30_27_REG    = 0x00000001                                         
Reg 28 (0x1c) 30_28_REG    = 0x00000001                                         
Reg 29 (0x1d) 30_29_REG    = 0x0000403f                                         
Reg 30 (0x1e) 30_30_REG    = 0x00000002                                         
Reg 31 (0x1f) 30_31_REG    = 0x0000175a                                         
Phy31 Registers:                                                               
Reg 00 (0x00) 31_0_REG     = 0x0000ffff                                         
Reg 01 (0x01) 31_1_REG     = 0x0000ffff                                         
Reg 02 (0x02) 31_2_REG     = 0x0000ffff                                         
Reg 03 (0x03) 31_3_REG     = 0x0000ffff                                         
Reg 04 (0x04) 31_4_REG     = 0x0000ffff                                         
Reg 05 (0x05) 31_5_REG     = 0x0000ffff                                         
Reg 06 (0x06) 31_6_REG     = 0x0000ffff

I am getting quite frustrated trying to get OpenWRT working on the RB450 and am ready to try a different approach to getting the problem solved.  Forgive me if this is inappropriate for this forum, but I would like to offer a bounty to the person who comes us with a working OpenWRT build (with source!) that works on the RB450, including the network stuff.

The bounty will be CAD$600:

- $300 to the winner
- $150 to OpenWRT
- $150 to the open source project of the winner's choosing

I have already donated two RB450s and two RB433s to the core OpenWRT team, so you can trust that the bounty will be paid.  Again, if this is inappropriate, let me know (kindly) and I'll withdraw the offer.

patience is a virtue.  I am sure we will sort this out.  it's just a matter of time.  our free time is limited but we will get this going one way or another.  I still feel that alix boards are by far a much better choice on cost/performance/stability/reliability and compatibility. also atom boards are just around the corner!

also if you think 800MHz is cool, check out this ARM 2GHz baby ...

(Last edited by acoul on 4 Jul 2008, 22:04)

In RB433 AR7100's MAC0 is connected through MII0 interface to IP175C's MAC5 which has to be switched to IP175C's MAC1(PHY1) and/or IP175C's MAC2(PHY2)
AR7100's MAC1 is connected through MII1 interface to IP175C's PHY4, this is RB433's POE port
IP175C's PHY0 and PHY3 are not used in RB433

My register dump was generated from Mikrotik's RouterOS 3.9. To make this you have to do the followings:
- Build a static Busybox with telnetd and login and sh support. Ofcourse you have to build any other network or shell tools which you want to use
- Boot your custom Openwrt or other custom kernel through ethernet
- Mount /dev/mtdblock1 to /mnt/mtd1
- Copy static busybox to /mnt/mtd1/bin/busybox.new. There is an original Busybox in bin directory so don't overwrite it.
- Make symbolic links from busybox.new to /mnt/mtd1/bin/telnetd, /mnt/mtd1/bin/sh and /mnt/mtd1/sbin/login. Don't overwrite login in bin directory.
- Make symbolic links to any other missing tools (ifconfig, route, etc.)
- Edit /mnt/mtd1/etc/rc.d/run.d/S10nova and insert the following at the begining of the file:
/bin/telnetd -l /sbin/login -p 2323
- Edit /mnt/mtd1/etc/passwd and set root's home to /root
- Reboot RouterOS
- Now you can telnet to RouterOS through port 2323 and get Linux shell
- Determine the exact kernel version
- Compile a test module for that kernel. Ony module init and exit needed. From this module you will able to access any memory region of RB4XX.
- Copy your module to RB4XX and modprobe it.
To print values I was not able to use printk because after inserting test module kernel immediatelly crashed. I wrote simple serial string print function based on AR7100's Uart16550Put function.

(Last edited by flam on 5 Jul 2008, 08:06)

Flam, thanks for the info.  I'll give it a go on Monday.

Acoul, patience may be a virtue but it's not one of mine! :-)  I'm simply running out of ideas on how to move forward.

I haven't given up working on this myself but thought that a little extra motivation might move the RB450 higher up on the priority list.  I'll work on finding a suitable place to place my target/linux/ar7100 stuff, hopefully by Monday as well.

hi all

i have booted the rb411 by netboot imaged provided,but when mounting the mtdblock1 or mtblock1 all file size is 0 ,what was going wrong? this is my dsmeg:

Linux version 2.6.23.17 (alex@extreme) (gcc version 4.2.4) #2 Mon Jun 30 14:04:06 EEST 2008
CPU revision is: 00019374
Determined physical RAM map:
User-defined physical RAM map:
memory: 02000000 @ 00000000 (usable)
Initrd not found or empty - disabling initrd
On node 0 totalpages: 8192
  Normal zone: 64 pages used for memmap
  Normal zone: 0 pages reserved
  Normal zone: 8128 pages, LIFO batch:0
  Movable zone: 0 pages used for memmap
Built 1 zonelists in Zone order.  Total pages: 8128
Kernel command line: console=ttyS0,115200 gpio=4031 mem=32M kmac=00:0C:42:17:5A:8B board=411 boot=1
Primary instruction cache 64kB, physically tagged, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, linesize 32 bytes.
Synthesized TLB refill handler (20 instructions).
Synthesized TLB load handler fastpath (32 instructions).
Synthesized TLB store handler fastpath (32 instructions).
Synthesized TLB modify handler fastpath (31 instructions).
Cache parity protection disabled
PID hash table entries: 128 (order: 7, 512 bytes)
Using 150.000 MHz high precision timer.
Console: colour dummy device 80x25
console [ttyS0] enabled
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory: 28140k/32768k available (2070k kernel code, 4628k reserved, 321k data, 804k init, 0k highmem)
Calibrating delay loop... 199.47 BogoMIPS (lpj=997376)
Mount-cache hash table entries: 512
NET: Registered protocol family 16
registering PCI controller with io_map_base unset
Generic PHY: Registered new driver
NET: Registered protocol family 2
Time: MIPS clocksource has been installed.
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
squashfs: version 3.0 (2006/03/15) Phillip Lougher
Registering mini_fo version $Id$
JFFS2 version 2.2. (NAND) (SUMMARY)  © 2001-2006 Red Hat, Inc.
yaffs Jun 30 2008 14:01:34 Installing.
io scheduler noop registered
io scheduler deadline registered (default)
Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x0 (irq = 19) is a 16550A
serial8250.0: ttyS1 at I/O 0x3f8 (irq = 4) is a 16450
serial8250.0: ttyS2 at I/O 0x2f8 (irq = 3) is a 16450
serial8250.0: ttyS3 at I/O 0x3e8 (irq = 4) is a 16450
serial8250 serial8250.0: unable to register port at index 3 (IO2e8 MEM0 IRQ3): -28
ICPlus IP175C: Registered new driver
Infineon ADM6996: Registered new driver
Marvell 88E6060: Registered new driver
AG7100: Length per segment 1536
AG7100: Max segments per packet 2
AG7100: Max tx descriptor count    256
AG7100: Max rx descriptor count    128
AG7100: fifo cfg 3 008001ff
AG7100CHH: Mac address for unit 0 '00:0c:42:17:5a:8b'
RB400 nand
NAND SPI clock 25000 kHz (AHB 150000 kHz / 6)
FLASH SPI clock 25000 kHz (AHB 150000 kHz / 6)
NAND device: Manufacturer ID: 0xad, Chip ID: 0x76 (Hynix NAND 64MiB 3,3V 8-bit)
Scanning device for bad blocks
Creating 3 MTD partitions on "NAND 64MiB 3,3V 8-bit":
0x00040000-0x00400000 : "RouterBoard NAND Boot"
0x00400000-0x04000000 : "RouterBoard NAND Main"
0x00000000-0x00040000 : "RouterBoard NAND Booter"
TCP vegas registered
NET: Registered protocol family 1
NET: Registered protocol family 17
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
Freeing unused kernel memory: 804k freed
Algorithmics/MIPS FPU Emulator v1.5
ag7100_ring_alloc Allocated 3072 at 0x81288000
ag7100_ring_alloc Allocated 1536 at 0x812c8000
AG7100: cfg1 0xf cfg2 0x7014
ksz_phy: autonegotiation is not supported
AG7100: unit 0: phy not up carrier 1
Writing 4
ag7100_ring_free Freeing at 0x81288000
ag7100_ring_free Freeing at 0x812c8000
ag7100_ring_alloc Allocated 3072 at 0x81288000
ag7100_ring_alloc Allocated 1536 at 0x812c8000
AG7100: cfg1 0xf cfg2 0x7014
ksz_phy: autonegotiation does not completed
Writing 4
ag7100_ring_free Freeing at 0x81288000
ag7100_ring_free Freeing at 0x812c8000
ag7100_ring_alloc Allocated 3072 at 0x81288000
ag7100_ring_alloc Allocated 1536 at 0x812c8000
AG7100: cfg1 0xf cfg2 0x7014
ksz_phy: autonegotiation is not supported
Writing 4
ag7100_ring_free Freeing at 0x81288000
ag7100_ring_free Freeing at 0x812c8000
ag7100_ring_alloc Allocated 3072 at 0x81288000
ag7100_ring_alloc Allocated 1536 at 0x812c8000
AG7100: cfg1 0xf cfg2 0x7014
ksz_phy: autonegotiation does not completed
Writing 4
AG7100: unit 0 phy is up...GMii 100Mbps full duplex
AG7100: pll reg 0x18050010: 0x1099  AG7100: cfg_1: 0x1ff0000
AG7100: cfg_2: 0x3ff
AG7100: cfg_3: 0x8001ff
AG7100: cfg_4: 0xffff
AG7100: cfg_5: 0x7ffef
AG7100: done cfg2 0x7115 ifctl 0x10000 miictrl 0x10
end_request: I/O error, dev mtdblock2, sector 0
SQUASHFS error: sb_bread failed reading block 0x0
yaffs: dev is 32505858 name is "mtdblock2"
yaffs: passed flags ""
yaffs: Attempting MTD mount on 31.2, "mtdblock2"
yaffs: dev is 32505857 name is "mtdblock1"
yaffs: passed flags ""
yaffs: Attempting MTD mount on 31.1, "mtdblock1"
root@OpenWrt:/#

please use the latest nedtboot image provided here. this is still work in progress.

Linux version 2.6.23.17 (alex@extreme) (gcc version 4.2.4) #3 Wed Jul 2 22:56:34 EEST 2008

Have you tried to enable the IP175C register by writing 0x175c to phy 29, register 31? Like the r6040.c driver does for the RDC3211 (e.g. on [s]Sitecom WL-153[/s] Airlink101 AR525W):

    if (lp->switch_sig  == ICPLUS_PHY_ID) {
        phy_write(ioaddr, 29, 31, 0x175C); /* Enable registers */

Maybe this fixes the values read from the registers.

(Last edited by jal2 on 7 Jul 2008, 11:19)

Belkin recently  also released some GPL code for this platform.

Looking at the Kconfig file under the drivers/net directory:

choice
    prompt "PHY (or switch) used"
    depends on AG7100

config ATHR_PHY
    bool "Atheros F1 GigE Phy"

config VITESSE_PHY
    bool "Vitesse GigE Phy 8201"

config VITESSE_8601_PHY
    bool "Vitesse Gige Phy 8601 on MAC0 and optionally on MAC1"

config VITESSE_8601_7395_PHY
    bool "Vitesse Gige Phy 8601 on MAC0 / VSC73XX Switch on MAC1"

config  ICPLUS_PHY
    bool "IP Icplus Phy"

config REALTEK_PHY
    bool "Rtl8201"

config ADM6996FC_PHY
    bool "AdmTek 6996FC"

endchoice

and here the relative header files.

(Last edited by acoul on 7 Jul 2008, 14:34)

Hi,

I've found another mystical problem on RB433. First I was not able to restart the board by writing AR7100's FULL_RESET bit. I started to play with other RESET bits and successfully rebooted it with NMI_RESET. After rebooting kernel can't see nand flash device and unable to mount partitions. After powering off and on RB433 the nand flash was usable again. It seems there is something difference between the nand driver Mikrotik published in their patch and which they use in RouterOS 3.10 because when I boot RouterOS after NMI_RESET it starts successfully and can mount flash devices. I think this is in connection with SPI.
Has anybody encountered this problem ?

(Last edited by flam on 7 Jul 2008, 16:04)

Unfortunately this did not do the trick.  Thanks for the suggestion.

I've made my RB450 specific snapshot available here: ftp://ftp.ipeaknetworks.com/ar7100/ar71 … r6.tar.bz2

I am still stuck on not being able to read the icPlus registers correctly.

Unfortunately the actual ipPhy driver is missing and none of the config files have the ipPhy Kconfig option defined.

Partial success!  I can now read/write the ipPhy registers on the RB450.  There were two problems with my previous snapshot.
1. Two of the ipPhy.h defines were incorrect.
2. The IC175C seems to revert to IC175A mode somewhere between initialization and opening of the interface between the 7130 and the 175C.

The updated snapshot can be found here along with the older tarball:
ftp://ftp.ipeaknetworks.com/ar7100/

Success!  I can pass packets through the WAN interface (labeled Eth1/PoE) of the RB450.  I have updated my snapshot.  Note that the port is accessible as eth1.

Full success.  Eth1/PoE appears as eth1 and Eth2 through Eth5 are accessible through eth0.  Snapshot updated.

Last update for today.  I have removed most of the debug messages and have fixed a quirk where both eth0 and eth1 had the same MAC address.  Snapshot is still at:
ftp://ftp.ipeaknetworks.com/ar7100/

Up to now I've been running off a network boot image.  I would appreciate any pointers on what I need to do to have this successfully written to the flash.

hi,
I build kamikaze with patches from acoul. I put kernel onto mtdblock0 on my rb 411 and rootfs onto mtdblock1. After this I don't have any communication with device. It doesn't response on the serial. It seems that bootloader has been written. What's going on?

Regards

(Last edited by krzychuu on 8 Jul 2008, 22:04)

I've been attempting to flash my OpenWRT image onto the RB450 but have run into an issue.  The bootloader finds the kernel and I've patched the kernel to recognize the correct MTD partition as the root fs.  However, when the kernel calls /sbin/init, the box hangs.  I've added some swears to linux/init.main.c to aid in debugging.   Here's a copy of the last few console messages at boot.  Any suggestions?

NAND device: Manufacturer ID: 0xad, Chip ID: 0x76 (Hynix NAND 64MiB 3,3V 8-bit) 
Scanning device for bad blocks                                                  
Creating 3 MTD partitions on "NAND 64MiB 3,3V 8-bit":                           
0x00040000-0x00400000 : "RouterBoard NAND Boot"                                 
0x00400000-0x04000000 : "RouterBoard NAND Main"                                 
mtd: partition "rootfs" set to be root filesystem                               
0x00000000-0x00040000 : "RouterBoard NAND Booter"                               
TCP vegas registered                                                            
NET: Registered protocol family 1                                               
NET: Registered protocol family 17                                              
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>                            
drivers/rtc/hctosys.c: unable to open rtc device (rtc0)                         
yaffs: dev is 32505857 name is "mtdblock1"                                      
yaffs: passed flags ""                                                          
yaffs: Attempting MTD mount on 31.1, "mtdblock1"                                
VFS: Mounted root (yaffs filesystem) readonly.                                  
Freeing unused kernel memory: 120k freed                                        
Please be patient, while OpenWrt loads ...                                      
About to call sys_dup(0)                                                        
About to check ramdisk_execute_command                                          
About to check execute_command                                                  
Trying to run /sbin/init

(Last edited by number6 on 9 Jul 2008, 16:20)

number6, with the netboot image are you able to mount and read the root filesystem under the mtdblock1?

Yes.  I have no trouble mounting mtdblock0 (kernel) and mtdblock1 (root) from the netboot image.  The structure of the root looks right and I can execute files within the mounted root partition, include /bin/busybox which /sbin/init softlinks to.